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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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74 // Don't load NaNs or infinities, branch to the non number case instead. | 74 // Don't load NaNs or infinities, branch to the non number case instead. |
75 AVOID_NANS_AND_INFINITIES = 1 << 1 | 75 AVOID_NANS_AND_INFINITIES = 1 << 1 |
76 }; | 76 }; |
77 | 77 |
78 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls. | 78 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls. |
79 enum BranchDelaySlot { | 79 enum BranchDelaySlot { |
80 USE_DELAY_SLOT, | 80 USE_DELAY_SLOT, |
81 PROTECT | 81 PROTECT |
82 }; | 82 }; |
83 | 83 |
84 // Flags used for the li macro-assembler function. | |
85 enum LiFlags { | |
86 // If the constant value can be represented in just 16 bits, then | |
87 // optimize the li to use a single instruction, rather than lui/ori pair. | |
88 OPTIMIZE_SIZE = 0, | |
89 // Always use 2 instructions (lui/ori pair), even if the constant could | |
90 // be loaded with just one, so that this value is patchable later. | |
91 CONSTANT_SIZE = 1 | |
92 }; | |
93 | |
84 | 94 |
85 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET }; | 95 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET }; |
86 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK }; | 96 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK }; |
87 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved }; | 97 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved }; |
88 | 98 |
89 bool AreAliased(Register r1, Register r2, Register r3, Register r4); | 99 bool AreAliased(Register r1, Register r2, Register r3, Register r4); |
90 | 100 |
91 | 101 |
92 // ----------------------------------------------------------------------------- | 102 // ----------------------------------------------------------------------------- |
93 // Static helper functions. | 103 // Static helper functions. |
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177 void Call(Handle<Code> code, | 187 void Call(Handle<Code> code, |
178 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET, | 188 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET, |
179 unsigned ast_id = kNoASTId, | 189 unsigned ast_id = kNoASTId, |
180 COND_ARGS); | 190 COND_ARGS); |
181 void Ret(COND_ARGS); | 191 void Ret(COND_ARGS); |
182 inline void Ret(BranchDelaySlot bd, Condition cond = al, | 192 inline void Ret(BranchDelaySlot bd, Condition cond = al, |
183 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) { | 193 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) { |
184 Ret(cond, rs, rt, bd); | 194 Ret(cond, rs, rt, bd); |
185 } | 195 } |
186 | 196 |
197 void Branch(Label* L, Condition cond, Register rs, Heap::RootListIndex index, | |
198 BranchDelaySlot bdslot = PROTECT); | |
199 | |
187 #undef COND_ARGS | 200 #undef COND_ARGS |
188 | 201 |
189 // Emit code to discard a non-negative number of pointer-sized elements | 202 // Emit code to discard a non-negative number of pointer-sized elements |
190 // from the stack, clobbering only the sp register. | 203 // from the stack, clobbering only the sp register. |
191 void Drop(int count, | 204 void Drop(int count, |
192 Condition cond = cc_always, | 205 Condition cond = cc_always, |
193 Register reg = no_reg, | 206 Register reg = no_reg, |
194 const Operand& op = Operand(no_reg)); | 207 const Operand& op = Operand(no_reg)); |
195 | 208 |
196 void DropAndRet(int drop = 0, | 209 void DropAndRet(int drop = 0, |
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230 | 243 |
231 // Jump unconditionally to given label. | 244 // Jump unconditionally to given label. |
232 // We NEED a nop in the branch delay slot, as it used by v8, for example in | 245 // We NEED a nop in the branch delay slot, as it used by v8, for example in |
233 // CodeGenerator::ProcessDeferred(). | 246 // CodeGenerator::ProcessDeferred(). |
234 // Currently the branch delay slot is filled by the MacroAssembler. | 247 // Currently the branch delay slot is filled by the MacroAssembler. |
235 // Use rather b(Label) for code generation. | 248 // Use rather b(Label) for code generation. |
236 void jmp(Label* L) { | 249 void jmp(Label* L) { |
237 Branch(L); | 250 Branch(L); |
238 } | 251 } |
239 | 252 |
240 | 253 int FindRootIndex(Object* heap_object); |
Erik Corry
2012/03/17 02:49:18
I got rid of this.
| |
241 // Load an object from the root table. | 254 // Load an object from the root table. |
242 void LoadRoot(Register destination, | 255 void LoadRoot(Register destination, |
243 Heap::RootListIndex index); | 256 Heap::RootListIndex index); |
244 void LoadRoot(Register destination, | 257 void LoadRoot(Register destination, |
245 Heap::RootListIndex index, | 258 Heap::RootListIndex index, |
246 Condition cond, Register src1, const Operand& src2); | 259 Condition cond, Register src1, const Operand& src2); |
247 | 260 |
248 // Store an object to the root table. | 261 // Store an object to the root table. |
249 void StoreRoot(Register source, | 262 void StoreRoot(Register source, |
250 Heap::RootListIndex index); | 263 Heap::RootListIndex index); |
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561 #undef DEFINE_INSTRUCTION | 574 #undef DEFINE_INSTRUCTION |
562 #undef DEFINE_INSTRUCTION2 | 575 #undef DEFINE_INSTRUCTION2 |
563 | 576 |
564 | 577 |
565 // --------------------------------------------------------------------------- | 578 // --------------------------------------------------------------------------- |
566 // Pseudo-instructions. | 579 // Pseudo-instructions. |
567 | 580 |
568 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } | 581 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } |
569 | 582 |
570 // Load int32 in the rd register. | 583 // Load int32 in the rd register. |
571 void li(Register rd, Operand j, bool gen2instr = false); | 584 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE); |
572 inline void li(Register rd, int32_t j, bool gen2instr = false) { | 585 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) { |
573 li(rd, Operand(j), gen2instr); | 586 li(rd, Operand(j), mode); |
574 } | 587 } |
575 inline void li(Register dst, Handle<Object> value, bool gen2instr = false) { | 588 inline void li(Register dst, Handle<Object> value, |
576 li(dst, Operand(value), gen2instr); | 589 LiFlags mode = OPTIMIZE_SIZE) { |
590 li(dst, Operand(value), mode); | |
577 } | 591 } |
578 | 592 |
579 // Push multiple registers on the stack. | 593 // Push multiple registers on the stack. |
580 // Registers are saved in numerical order, with higher numbered registers | 594 // Registers are saved in numerical order, with higher numbered registers |
581 // saved in higher memory addresses. | 595 // saved in higher memory addresses. |
582 void MultiPush(RegList regs); | 596 void MultiPush(RegList regs); |
583 void MultiPushReversed(RegList regs); | 597 void MultiPushReversed(RegList regs); |
584 | 598 |
585 void MultiPushFPU(RegList regs); | 599 void MultiPushFPU(RegList regs); |
586 void MultiPushReversedFPU(RegList regs); | 600 void MultiPushReversedFPU(RegList regs); |
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1474 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) | 1488 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) |
1475 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) | 1489 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) |
1476 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> | 1490 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> |
1477 #else | 1491 #else |
1478 #define ACCESS_MASM(masm) masm-> | 1492 #define ACCESS_MASM(masm) masm-> |
1479 #endif | 1493 #endif |
1480 | 1494 |
1481 } } // namespace v8::internal | 1495 } } // namespace v8::internal |
1482 | 1496 |
1483 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 1497 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
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