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Side by Side Diff: src/mips/assembler-mips.h

Issue 9231009: More spelling changes. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 8 years, 11 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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660 void bltz(Register rs, int16_t offset); 660 void bltz(Register rs, int16_t offset);
661 void bltzal(Register rs, int16_t offset); 661 void bltzal(Register rs, int16_t offset);
662 void bne(Register rs, Register rt, int16_t offset); 662 void bne(Register rs, Register rt, int16_t offset);
663 void bne(Register rs, Register rt, Label* L) { 663 void bne(Register rs, Register rt, Label* L) {
664 bne(rs, rt, branch_offset(L, false)>>2); 664 bne(rs, rt, branch_offset(L, false)>>2);
665 } 665 }
666 666
667 // Never use the int16_t b(l)cond version with a branch offset 667 // Never use the int16_t b(l)cond version with a branch offset
668 // instead of using the Label* version. 668 // instead of using the Label* version.
669 669
670 // Jump targets must be in the current 256 MB-aligned region. ie 28 bits. 670 // Jump targets must be in the current 256 MB-aligned region. i.e. 28 bits.
671 void j(int32_t target); 671 void j(int32_t target);
672 void jal(int32_t target); 672 void jal(int32_t target);
673 void jalr(Register rs, Register rd = ra); 673 void jalr(Register rs, Register rd = ra);
674 void jr(Register target); 674 void jr(Register target);
675 void j_or_jr(int32_t target, Register rs); 675 void j_or_jr(int32_t target, Register rs);
676 void jal_or_jalr(int32_t target, Register rs); 676 void jal_or_jalr(int32_t target, Register rs);
677 677
678 678
679 //-------Data-processing-instructions--------- 679 //-------Data-processing-instructions---------
680 680
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1254 class EnsureSpace BASE_EMBEDDED { 1254 class EnsureSpace BASE_EMBEDDED {
1255 public: 1255 public:
1256 explicit EnsureSpace(Assembler* assembler) { 1256 explicit EnsureSpace(Assembler* assembler) {
1257 assembler->CheckBuffer(); 1257 assembler->CheckBuffer();
1258 } 1258 }
1259 }; 1259 };
1260 1260
1261 } } // namespace v8::internal 1261 } } // namespace v8::internal
1262 1262
1263 #endif // V8_ARM_ASSEMBLER_MIPS_H_ 1263 #endif // V8_ARM_ASSEMBLER_MIPS_H_
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