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Issue 9227007: Version 3.8.6 (Closed) Base URL: http://v8.googlecode.com/svn/trunk/
Patch Set: Created 8 years, 11 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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40 40
41 #include "cpu.h" 41 #include "cpu.h"
42 #include "macro-assembler.h" 42 #include "macro-assembler.h"
43 43
44 #include "simulator.h" // For cache flushing. 44 #include "simulator.h" // For cache flushing.
45 45
46 namespace v8 { 46 namespace v8 {
47 namespace internal { 47 namespace internal {
48 48
49 49
50 void CPU::Setup() { 50 void CPU::SetUp() {
51 CpuFeatures::Probe(); 51 CpuFeatures::Probe();
52 } 52 }
53 53
54 54
55 bool CPU::SupportsCrankshaft() { 55 bool CPU::SupportsCrankshaft() {
56 return CpuFeatures::IsSupported(FPU); 56 return CpuFeatures::IsSupported(FPU);
57 } 57 }
58 58
59 59
60 void CPU::FlushICache(void* start, size_t size) { 60 void CPU::FlushICache(void* start, size_t size) {
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87 void CPU::DebugBreak() { 87 void CPU::DebugBreak() {
88 #ifdef __mips 88 #ifdef __mips
89 asm volatile("break"); 89 asm volatile("break");
90 #endif // #ifdef __mips 90 #endif // #ifdef __mips
91 } 91 }
92 92
93 93
94 } } // namespace v8::internal 94 } } // namespace v8::internal
95 95
96 #endif // V8_TARGET_ARCH_MIPS 96 #endif // V8_TARGET_ARCH_MIPS
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