| Index: src/assembler-arm-inl.h
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| diff --git a/src/assembler-arm-inl.h b/src/assembler-arm-inl.h
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| deleted file mode 100644
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| index 315605e78bdbfd79c17a8f6031f413bc9a9fc998..0000000000000000000000000000000000000000
|
| --- a/src/assembler-arm-inl.h
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| +++ /dev/null
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| @@ -1,249 +0,0 @@
|
| -// Copyright (c) 1994-2006 Sun Microsystems Inc.
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| -// All Rights Reserved.
|
| -//
|
| -// Redistribution and use in source and binary forms, with or without
|
| -// modification, are permitted provided that the following conditions
|
| -// are met:
|
| -//
|
| -// - Redistributions of source code must retain the above copyright notice,
|
| -// this list of conditions and the following disclaimer.
|
| -//
|
| -// - Redistribution in binary form must reproduce the above copyright
|
| -// notice, this list of conditions and the following disclaimer in the
|
| -// documentation and/or other materials provided with the
|
| -// distribution.
|
| -//
|
| -// - Neither the name of Sun Microsystems or the names of contributors may
|
| -// be used to endorse or promote products derived from this software without
|
| -// specific prior written permission.
|
| -//
|
| -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
| -// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
| -// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
| -// FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
| -// COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
| -// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
| -// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
| -// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
| -// HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
| -// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
| -// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
| -// OF THE POSSIBILITY OF SUCH DAMAGE.
|
| -
|
| -// The original source code covered by the above license above has been modified
|
| -// significantly by Google Inc.
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| -// Copyright 2006-2008 the V8 project authors. All rights reserved.
|
| -
|
| -#ifndef V8_ASSEMBLER_ARM_INL_H_
|
| -#define V8_ASSEMBLER_ARM_INL_H_
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| -
|
| -#include "assembler-arm.h"
|
| -#include "cpu.h"
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| -
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| -
|
| -namespace v8 { namespace internal {
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| -
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| -Condition NegateCondition(Condition cc) {
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| - ASSERT(cc != al);
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| - return static_cast<Condition>(cc ^ ne);
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| -}
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| -
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| -
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| -void RelocInfo::apply(int delta) {
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| - if (RelocInfo::IsInternalReference(rmode_)) {
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| - // absolute code pointer inside code object moves with the code object.
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| - int32_t* p = reinterpret_cast<int32_t*>(pc_);
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| - *p += delta; // relocate entry
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| - }
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| - // We do not use pc relative addressing on ARM, so there is
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| - // nothing else to do.
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| -}
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| -
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| -
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| -Address RelocInfo::target_address() {
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| - ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
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| - return Assembler::target_address_at(pc_);
|
| -}
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| -
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| -
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| -Address RelocInfo::target_address_address() {
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| - ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
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| - return reinterpret_cast<Address>(Assembler::target_address_address_at(pc_));
|
| -}
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| -
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| -
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| -void RelocInfo::set_target_address(Address target) {
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| - ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY);
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| - Assembler::set_target_address_at(pc_, target);
|
| -}
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| -
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| -
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| -Object* RelocInfo::target_object() {
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| - ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
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| - return reinterpret_cast<Object*>(Assembler::target_address_at(pc_));
|
| -}
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| -
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| -
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| -Object** RelocInfo::target_object_address() {
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| - ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
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| - return reinterpret_cast<Object**>(Assembler::target_address_address_at(pc_));
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| -}
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| -
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| -
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| -void RelocInfo::set_target_object(Object* target) {
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| - ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
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| - Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target));
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| -}
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| -
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| -
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| -Address* RelocInfo::target_reference_address() {
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| - ASSERT(rmode_ == EXTERNAL_REFERENCE);
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| - return reinterpret_cast<Address*>(Assembler::target_address_address_at(pc_));
|
| -}
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| -
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| -
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| -Address RelocInfo::call_address() {
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| - ASSERT(IsCallInstruction());
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| - UNIMPLEMENTED();
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| - return NULL;
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| -}
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| -
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| -
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| -void RelocInfo::set_call_address(Address target) {
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| - ASSERT(IsCallInstruction());
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| - UNIMPLEMENTED();
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| -}
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| -
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| -
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| -Object* RelocInfo::call_object() {
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| - ASSERT(IsCallInstruction());
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| - UNIMPLEMENTED();
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| - return NULL;
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| -}
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| -
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| -
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| -Object** RelocInfo::call_object_address() {
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| - ASSERT(IsCallInstruction());
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| - UNIMPLEMENTED();
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| - return NULL;
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| -}
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| -
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| -
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| -void RelocInfo::set_call_object(Object* target) {
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| - ASSERT(IsCallInstruction());
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| - UNIMPLEMENTED();
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| -}
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| -
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| -
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| -bool RelocInfo::IsCallInstruction() {
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| - UNIMPLEMENTED();
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| - return false;
|
| -}
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| -
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| -
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| -Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) {
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| - rm_ = no_reg;
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| - imm32_ = immediate;
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| - rmode_ = rmode;
|
| -}
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| -
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| -
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| -Operand::Operand(const char* s) {
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| - rm_ = no_reg;
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| - imm32_ = reinterpret_cast<int32_t>(s);
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| - rmode_ = RelocInfo::EMBEDDED_STRING;
|
| -}
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| -
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| -
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| -Operand::Operand(const ExternalReference& f) {
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| - rm_ = no_reg;
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| - imm32_ = reinterpret_cast<int32_t>(f.address());
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| - rmode_ = RelocInfo::EXTERNAL_REFERENCE;
|
| -}
|
| -
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| -
|
| -Operand::Operand(Object** opp) {
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| - rm_ = no_reg;
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| - imm32_ = reinterpret_cast<int32_t>(opp);
|
| - rmode_ = RelocInfo::NONE;
|
| -}
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| -
|
| -
|
| -Operand::Operand(Context** cpp) {
|
| - rm_ = no_reg;
|
| - imm32_ = reinterpret_cast<int32_t>(cpp);
|
| - rmode_ = RelocInfo::NONE;
|
| -}
|
| -
|
| -
|
| -Operand::Operand(Smi* value) {
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| - rm_ = no_reg;
|
| - imm32_ = reinterpret_cast<intptr_t>(value);
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| - rmode_ = RelocInfo::NONE;
|
| -}
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| -
|
| -
|
| -Operand::Operand(Register rm) {
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| - rm_ = rm;
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| - rs_ = no_reg;
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| - shift_op_ = LSL;
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| - shift_imm_ = 0;
|
| -}
|
| -
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| -
|
| -bool Operand::is_reg() const {
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| - return rm_.is_valid() &&
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| - rs_.is(no_reg) &&
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| - shift_op_ == LSL &&
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| - shift_imm_ == 0;
|
| -}
|
| -
|
| -
|
| -void Assembler::CheckBuffer() {
|
| - if (buffer_space() <= kGap) {
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| - GrowBuffer();
|
| - }
|
| - if (pc_offset() > next_buffer_check_) {
|
| - CheckConstPool(false, true);
|
| - }
|
| -}
|
| -
|
| -
|
| -void Assembler::emit(Instr x) {
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| - CheckBuffer();
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| - *reinterpret_cast<Instr*>(pc_) = x;
|
| - pc_ += kInstrSize;
|
| -}
|
| -
|
| -
|
| -Address Assembler::target_address_address_at(Address pc) {
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| - Instr instr = Memory::int32_at(pc);
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| - // Verify that the instruction at pc is a ldr<cond> <Rd>, [pc +/- offset_12].
|
| - ASSERT((instr & 0x0f7f0000) == 0x051f0000);
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| - int offset = instr & 0xfff; // offset_12 is unsigned
|
| - if ((instr & (1 << 23)) == 0) offset = -offset; // U bit defines offset sign
|
| - // Verify that the constant pool comes after the instruction referencing it.
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| - ASSERT(offset >= -4);
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| - return pc + offset + 8;
|
| -}
|
| -
|
| -
|
| -Address Assembler::target_address_at(Address pc) {
|
| - return Memory::Address_at(target_address_address_at(pc));
|
| -}
|
| -
|
| -
|
| -void Assembler::set_target_address_at(Address pc, Address target) {
|
| - Memory::Address_at(target_address_address_at(pc)) = target;
|
| - // Intuitively, we would think it is necessary to flush the instruction cache
|
| - // after patching a target address in the code as follows:
|
| - // CPU::FlushICache(pc, sizeof(target));
|
| - // However, on ARM, no instruction was actually patched by the assignment
|
| - // above; the target address is not part of an instruction, it is patched in
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| - // the constant pool and is read via a data access; the instruction accessing
|
| - // this address in the constant pool remains unchanged.
|
| -}
|
| -
|
| -} } // namespace v8::internal
|
| -
|
| -#endif // V8_ASSEMBLER_ARM_INL_H_
|
|
|