OLD | NEW |
| (Empty) |
1 // Copyright 2008 the V8 project authors. All rights reserved. | |
2 // Redistribution and use in source and binary forms, with or without | |
3 // modification, are permitted provided that the following conditions are | |
4 // met: | |
5 // | |
6 // * Redistributions of source code must retain the above copyright | |
7 // notice, this list of conditions and the following disclaimer. | |
8 // * Redistributions in binary form must reproduce the above | |
9 // copyright notice, this list of conditions and the following | |
10 // disclaimer in the documentation and/or other materials provided | |
11 // with the distribution. | |
12 // * Neither the name of Google Inc. nor the names of its | |
13 // contributors may be used to endorse or promote products derived | |
14 // from this software without specific prior written permission. | |
15 // | |
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
27 | |
28 | |
29 // Declares a Simulator for ARM instructions if we are not generating a native | |
30 // ARM binary. This Simulator allows us to run and debug ARM code generation on | |
31 // regular desktop machines. | |
32 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | |
33 // which will start execution in the Simulator or forwards to the real entry | |
34 // on a ARM HW platform. | |
35 | |
36 #ifndef V8_SIMULATOR_ARM_H_ | |
37 #define V8_SIMULATOR_ARM_H_ | |
38 | |
39 #if defined(__arm__) | |
40 | |
41 // When running without a simulator we call the entry directly. | |
42 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \ | |
43 entry(p0, p1, p2, p3, p4) | |
44 | |
45 // Calculated the stack limit beyond which we will throw stack overflow errors. | |
46 // This macro must be called from a C++ method. It relies on being able to take | |
47 // the address of "this" to get a value on the current execution stack and then | |
48 // calculates the stack limit based on that value. | |
49 #define GENERATED_CODE_STACK_LIMIT(limit) \ | |
50 (reinterpret_cast<uintptr_t>(this) - limit) | |
51 | |
52 #else // defined(__arm__) | |
53 | |
54 // When running with the simulator transition into simulated execution at this | |
55 // point. | |
56 #define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \ | |
57 assembler::arm::Simulator::current()->Call((int32_t)entry, (int32_t)p0, \ | |
58 (int32_t)p1, (int32_t)p2, (int32_t)p3, (int32_t)p4) | |
59 | |
60 // The simulator has its own stack. Thus it has a different stack limit from | |
61 // the C-based native code. | |
62 #define GENERATED_CODE_STACK_LIMIT(limit) \ | |
63 (assembler::arm::Simulator::current()->StackLimit()) | |
64 | |
65 | |
66 #include "constants-arm.h" | |
67 | |
68 | |
69 namespace assembler { namespace arm { | |
70 | |
71 class Simulator { | |
72 public: | |
73 friend class Debugger; | |
74 | |
75 enum Register { | |
76 no_reg = -1, | |
77 r0 = 0, r1, r2, r3, r4, r5, r6, r7, | |
78 r8, r9, r10, r11, r12, r13, r14, r15, | |
79 num_registers, | |
80 sp = 13, | |
81 lr = 14, | |
82 pc = 15 | |
83 }; | |
84 | |
85 Simulator(); | |
86 ~Simulator(); | |
87 | |
88 // The currently executing Simulator instance. Potentially there can be one | |
89 // for each native thread. | |
90 static Simulator* current(); | |
91 | |
92 // Accessors for register state. Reading the pc value adheres to the ARM | |
93 // architecture specification and is off by a 8 from the currently executing | |
94 // instruction. | |
95 void set_register(int reg, int32_t value); | |
96 int32_t get_register(int reg) const; | |
97 | |
98 // Special case of set_register and get_register to access the raw PC value. | |
99 void set_pc(int32_t value); | |
100 int32_t get_pc() const; | |
101 | |
102 // Accessor to the internal simulator stack area. | |
103 uintptr_t StackLimit() const; | |
104 | |
105 // Executes ARM instructions until the PC reaches end_sim_pc. | |
106 void Execute(); | |
107 | |
108 // V8 generally calls into generated code with 5 parameters. This is a | |
109 // convenience function, which sets up the simulator state and grabs the | |
110 // result on return. | |
111 v8::internal::Object* Call(int32_t entry, int32_t p0, int32_t p1, | |
112 int32_t p2, int32_t p3, int32_t p4); | |
113 | |
114 private: | |
115 enum special_values { | |
116 // Known bad pc value to ensure that the simulator does not execute | |
117 // without being properly setup. | |
118 bad_lr = -1, | |
119 // A pc value used to signal the simulator to stop execution. Generally | |
120 // the lr is set to this value on transition from native C code to | |
121 // simulated execution, so that the simulator can "return" to the native | |
122 // C code. | |
123 end_sim_pc = -2 | |
124 }; | |
125 | |
126 // Unsupported instructions use Format to print an error and stop execution. | |
127 void Format(Instr* instr, const char* format); | |
128 | |
129 // Checks if the current instruction should be executed based on its | |
130 // condition bits. | |
131 bool ConditionallyExecute(Instr* instr); | |
132 | |
133 // Helper functions to set the conditional flags in the architecture state. | |
134 void SetNZFlags(int32_t val); | |
135 void SetCFlag(bool val); | |
136 void SetVFlag(bool val); | |
137 bool CarryFrom(int32_t left, int32_t right); | |
138 bool BorrowFrom(int32_t left, int32_t right); | |
139 bool OverflowFrom(int32_t alu_out, | |
140 int32_t left, | |
141 int32_t right, | |
142 bool addition); | |
143 | |
144 // Helper functions to decode common "addressing" modes | |
145 int32_t GetShiftRm(Instr* instr, bool* carry_out); | |
146 int32_t GetImm(Instr* instr, bool* carry_out); | |
147 void HandleRList(Instr* instr, bool load); | |
148 void SoftwareInterrupt(Instr* instr); | |
149 | |
150 // Read and write memory. | |
151 inline uint8_t ReadBU(int32_t addr); | |
152 inline int8_t ReadB(int32_t addr); | |
153 inline void WriteB(int32_t addr, uint8_t value); | |
154 inline void WriteB(int32_t addr, int8_t value); | |
155 | |
156 inline uint16_t ReadHU(int32_t addr, Instr* instr); | |
157 inline int16_t ReadH(int32_t addr, Instr* instr); | |
158 // Note: Overloaded on the sign of the value. | |
159 inline void WriteH(int32_t addr, uint16_t value, Instr* instr); | |
160 inline void WriteH(int32_t addr, int16_t value, Instr* instr); | |
161 | |
162 inline int ReadW(int32_t addr, Instr* instr); | |
163 inline void WriteW(int32_t addr, int value, Instr* instr); | |
164 | |
165 // Executing is handled based on the instruction type. | |
166 void DecodeType01(Instr* instr); // both type 0 and type 1 rolled into one | |
167 void DecodeType2(Instr* instr); | |
168 void DecodeType3(Instr* instr); | |
169 void DecodeType4(Instr* instr); | |
170 void DecodeType5(Instr* instr); | |
171 void DecodeType6(Instr* instr); | |
172 void DecodeType7(Instr* instr); | |
173 | |
174 // Executes one instruction. | |
175 void InstructionDecode(Instr* instr); | |
176 | |
177 // For use in calls that take two double values, constructed from r0, r1, r2 | |
178 // and r3. | |
179 void GetFpArgs(double* x, double* y); | |
180 void SetFpResult(const double& result); | |
181 void TrashCallerSaveRegisters(); | |
182 | |
183 // architecture state | |
184 int32_t registers_[16]; | |
185 bool n_flag_; | |
186 bool z_flag_; | |
187 bool c_flag_; | |
188 bool v_flag_; | |
189 | |
190 // simulator support | |
191 char* stack_; | |
192 bool pc_modified_; | |
193 int icount_; | |
194 | |
195 // registered breakpoints | |
196 Instr* break_pc_; | |
197 instr_t break_instr_; | |
198 }; | |
199 | |
200 } } // namespace assembler::arm | |
201 | |
202 #endif // defined(__arm__) | |
203 | |
204 #endif // V8_SIMULATOR_ARM_H_ | |
OLD | NEW |