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Issue 9174023: Split NumberDictionary into a randomly seeded and an unseeded (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 8 years, 11 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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480 // 480 //
481 // reg1 - Used to hold the capacity mask of the dictionary. 481 // reg1 - Used to hold the capacity mask of the dictionary.
482 // 482 //
483 // reg2 - Used for the index into the dictionary. 483 // reg2 - Used for the index into the dictionary.
484 // at - Temporary (avoid MacroAssembler instructions also using 'at'). 484 // at - Temporary (avoid MacroAssembler instructions also using 'at').
485 Label done; 485 Label done;
486 486
487 GetNumberHash(reg0, reg1); 487 GetNumberHash(reg0, reg1);
488 488
489 // Compute the capacity mask. 489 // Compute the capacity mask.
490 lw(reg1, FieldMemOperand(elements, NumberDictionary::kCapacityOffset)); 490 lw(reg1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
491 sra(reg1, reg1, kSmiTagSize); 491 sra(reg1, reg1, kSmiTagSize);
492 Subu(reg1, reg1, Operand(1)); 492 Subu(reg1, reg1, Operand(1));
493 493
494 // Generate an unrolled loop that performs a few probes before giving up. 494 // Generate an unrolled loop that performs a few probes before giving up.
495 static const int kProbes = 4; 495 static const int kProbes = 4;
496 for (int i = 0; i < kProbes; i++) { 496 for (int i = 0; i < kProbes; i++) {
497 // Use reg2 for index calculations and keep the hash intact in reg0. 497 // Use reg2 for index calculations and keep the hash intact in reg0.
498 mov(reg2, reg0); 498 mov(reg2, reg0);
499 // Compute the masked index: (hash + i + i * i) & mask. 499 // Compute the masked index: (hash + i + i * i) & mask.
500 if (i > 0) { 500 if (i > 0) {
501 Addu(reg2, reg2, Operand(NumberDictionary::GetProbeOffset(i))); 501 Addu(reg2, reg2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
502 } 502 }
503 and_(reg2, reg2, reg1); 503 and_(reg2, reg2, reg1);
504 504
505 // Scale the index by multiplying by the element size. 505 // Scale the index by multiplying by the element size.
506 ASSERT(NumberDictionary::kEntrySize == 3); 506 ASSERT(SeededNumberDictionary::kEntrySize == 3);
507 sll(at, reg2, 1); // 2x. 507 sll(at, reg2, 1); // 2x.
508 addu(reg2, reg2, at); // reg2 = reg2 * 3. 508 addu(reg2, reg2, at); // reg2 = reg2 * 3.
509 509
510 // Check if the key is identical to the name. 510 // Check if the key is identical to the name.
511 sll(at, reg2, kPointerSizeLog2); 511 sll(at, reg2, kPointerSizeLog2);
512 addu(reg2, elements, at); 512 addu(reg2, elements, at);
513 513
514 lw(at, FieldMemOperand(reg2, NumberDictionary::kElementsStartOffset)); 514 lw(at, FieldMemOperand(reg2, SeededNumberDictionary::kElementsStartOffset));
515 if (i != kProbes - 1) { 515 if (i != kProbes - 1) {
516 Branch(&done, eq, key, Operand(at)); 516 Branch(&done, eq, key, Operand(at));
517 } else { 517 } else {
518 Branch(miss, ne, key, Operand(at)); 518 Branch(miss, ne, key, Operand(at));
519 } 519 }
520 } 520 }
521 521
522 bind(&done); 522 bind(&done);
523 // Check that the value is a normal property. 523 // Check that the value is a normal property.
524 // reg2: elements + (index * kPointerSize). 524 // reg2: elements + (index * kPointerSize).
525 const int kDetailsOffset = 525 const int kDetailsOffset =
526 NumberDictionary::kElementsStartOffset + 2 * kPointerSize; 526 SeededNumberDictionary::kElementsStartOffset + 2 * kPointerSize;
527 lw(reg1, FieldMemOperand(reg2, kDetailsOffset)); 527 lw(reg1, FieldMemOperand(reg2, kDetailsOffset));
528 And(at, reg1, Operand(Smi::FromInt(PropertyDetails::TypeField::kMask))); 528 And(at, reg1, Operand(Smi::FromInt(PropertyDetails::TypeField::kMask)));
529 Branch(miss, ne, at, Operand(zero_reg)); 529 Branch(miss, ne, at, Operand(zero_reg));
530 530
531 // Get the value at the masked, scaled index and return. 531 // Get the value at the masked, scaled index and return.
532 const int kValueOffset = 532 const int kValueOffset =
533 NumberDictionary::kElementsStartOffset + kPointerSize; 533 SeededNumberDictionary::kElementsStartOffset + kPointerSize;
534 lw(result, FieldMemOperand(reg2, kValueOffset)); 534 lw(result, FieldMemOperand(reg2, kValueOffset));
535 } 535 }
536 536
537 537
538 // --------------------------------------------------------------------------- 538 // ---------------------------------------------------------------------------
539 // Instruction macros. 539 // Instruction macros.
540 540
541 void MacroAssembler::Addu(Register rd, Register rs, const Operand& rt) { 541 void MacroAssembler::Addu(Register rd, Register rs, const Operand& rt) {
542 if (rt.is_reg()) { 542 if (rt.is_reg()) {
543 addu(rd, rs, rt.rm()); 543 addu(rd, rs, rt.rm());
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5045 opcode == BGTZL); 5045 opcode == BGTZL);
5046 opcode = (cond == eq) ? BEQ : BNE; 5046 opcode = (cond == eq) ? BEQ : BNE;
5047 instr = (instr & ~kOpcodeMask) | opcode; 5047 instr = (instr & ~kOpcodeMask) | opcode;
5048 masm_.emit(instr); 5048 masm_.emit(instr);
5049 } 5049 }
5050 5050
5051 5051
5052 } } // namespace v8::internal 5052 } } // namespace v8::internal
5053 5053
5054 #endif // V8_TARGET_ARCH_MIPS 5054 #endif // V8_TARGET_ARCH_MIPS
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