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Unified Diff: src/mips/code-stubs-mips.cc

Issue 9169010: Fix zero hash handling on ARM. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 8 years, 11 months ago
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Index: src/mips/code-stubs-mips.cc
===================================================================
--- src/mips/code-stubs-mips.cc (revision 10360)
+++ src/mips/code-stubs-mips.cc (working copy)
@@ -5954,7 +5954,7 @@
void StringHelper::GenerateHashGetHash(MacroAssembler* masm,
- Register hash) {
+ Register hash) {
// hash += hash << 3;
__ sll(at, hash, 3);
__ addu(hash, hash, at);
@@ -5965,12 +5965,11 @@
__ sll(at, hash, 15);
__ addu(hash, hash, at);
- uint32_t kHashShiftCutOffMask = (1 << (32 - String::kHashShift)) - 1;
- __ li(at, Operand(kHashShiftCutOffMask));
+ __ li(at, Operand(String::kHashBitMask));
__ and_(hash, hash, at);
// if (hash == 0) hash = 27;
- __ ori(at, zero_reg, 27);
+ __ ori(at, zero_reg, StringHasher::kZeroHash);
__ movz(hash, at, hash);
}
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