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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 25 // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | 25 // INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 26 // (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | 26 // (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| 27 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 27 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 28 // HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | 28 // HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| 29 // STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | 29 // STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 30 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED | 30 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED |
| 31 // OF THE POSSIBILITY OF SUCH DAMAGE. | 31 // OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | 32 |
| 33 // The original source code covered by the above license above has been | 33 // The original source code covered by the above license above has been |
| 34 // modified significantly by Google Inc. | 34 // modified significantly by Google Inc. |
| 35 // Copyright 2011 the V8 project authors. All rights reserved. | 35 // Copyright 2012 the V8 project authors. All rights reserved. |
| 36 | 36 |
| 37 // A light-weight ARM Assembler | 37 // A light-weight ARM Assembler |
| 38 // Generates user mode instructions for the ARM architecture up to version 5 | 38 // Generates user mode instructions for the ARM architecture up to version 5 |
| 39 | 39 |
| 40 #ifndef V8_ARM_ASSEMBLER_ARM_H_ | 40 #ifndef V8_ARM_ASSEMBLER_ARM_H_ |
| 41 #define V8_ARM_ASSEMBLER_ARM_H_ | 41 #define V8_ARM_ASSEMBLER_ARM_H_ |
| 42 #include <stdio.h> | 42 #include <stdio.h> |
| 43 #include "assembler.h" | 43 #include "assembler.h" |
| 44 #include "constants-arm.h" | 44 #include "constants-arm.h" |
| 45 #include "serialize.h" | 45 #include "serialize.h" |
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| 169 struct DwVfpRegister { | 169 struct DwVfpRegister { |
| 170 static const int kNumRegisters = 16; | 170 static const int kNumRegisters = 16; |
| 171 // A few double registers are reserved: one as a scratch register and one to | 171 // A few double registers are reserved: one as a scratch register and one to |
| 172 // hold 0.0, that does not fit in the immediate field of vmov instructions. | 172 // hold 0.0, that does not fit in the immediate field of vmov instructions. |
| 173 // d14: 0.0 | 173 // d14: 0.0 |
| 174 // d15: scratch register. | 174 // d15: scratch register. |
| 175 static const int kNumReservedRegisters = 2; | 175 static const int kNumReservedRegisters = 2; |
| 176 static const int kNumAllocatableRegisters = kNumRegisters - | 176 static const int kNumAllocatableRegisters = kNumRegisters - |
| 177 kNumReservedRegisters; | 177 kNumReservedRegisters; |
| 178 | 178 |
| 179 static int ToAllocationIndex(DwVfpRegister reg) { | 179 inline static int ToAllocationIndex(DwVfpRegister reg); |
| 180 ASSERT(reg.code() != 0); | |
| 181 return reg.code() - 1; | |
| 182 } | |
| 183 | 180 |
| 184 static DwVfpRegister FromAllocationIndex(int index) { | 181 static DwVfpRegister FromAllocationIndex(int index) { |
| 185 ASSERT(index >= 0 && index < kNumAllocatableRegisters); | 182 ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
| 186 return from_code(index + 1); | 183 return from_code(index); |
| 187 } | 184 } |
| 188 | 185 |
| 189 static const char* AllocationIndexToString(int index) { | 186 static const char* AllocationIndexToString(int index) { |
| 190 ASSERT(index >= 0 && index < kNumAllocatableRegisters); | 187 ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
| 191 const char* const names[] = { | 188 const char* const names[] = { |
| 192 "d0", | 189 "d0", |
| 193 "d1", | 190 "d1", |
| 194 "d2", | 191 "d2", |
| 195 "d3", | 192 "d3", |
| 196 "d4", | 193 "d4", |
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| 300 const DwVfpRegister d11 = { 11 }; | 297 const DwVfpRegister d11 = { 11 }; |
| 301 const DwVfpRegister d12 = { 12 }; | 298 const DwVfpRegister d12 = { 12 }; |
| 302 const DwVfpRegister d13 = { 13 }; | 299 const DwVfpRegister d13 = { 13 }; |
| 303 const DwVfpRegister d14 = { 14 }; | 300 const DwVfpRegister d14 = { 14 }; |
| 304 const DwVfpRegister d15 = { 15 }; | 301 const DwVfpRegister d15 = { 15 }; |
| 305 | 302 |
| 306 // Aliases for double registers. | 303 // Aliases for double registers. |
| 307 static const DwVfpRegister& kFirstCalleeSavedDoubleReg = d8; | 304 static const DwVfpRegister& kFirstCalleeSavedDoubleReg = d8; |
| 308 static const DwVfpRegister& kLastCalleeSavedDoubleReg = d15; | 305 static const DwVfpRegister& kLastCalleeSavedDoubleReg = d15; |
| 309 static const DwVfpRegister& kDoubleRegZero = d14; | 306 static const DwVfpRegister& kDoubleRegZero = d14; |
| 307 static const DwVfpRegister& kScratchDoubleReg = d15; |
| 310 | 308 |
| 311 | 309 |
| 312 // Coprocessor register | 310 // Coprocessor register |
| 313 struct CRegister { | 311 struct CRegister { |
| 314 bool is_valid() const { return 0 <= code_ && code_ < 16; } | 312 bool is_valid() const { return 0 <= code_ && code_ < 16; } |
| 315 bool is(CRegister creg) const { return code_ == creg.code_; } | 313 bool is(CRegister creg) const { return code_ == creg.code_; } |
| 316 int code() const { | 314 int code() const { |
| 317 ASSERT(is_valid()); | 315 ASSERT(is_valid()); |
| 318 return code_; | 316 return code_; |
| 319 } | 317 } |
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| 1413 public: | 1411 public: |
| 1414 explicit EnsureSpace(Assembler* assembler) { | 1412 explicit EnsureSpace(Assembler* assembler) { |
| 1415 assembler->CheckBuffer(); | 1413 assembler->CheckBuffer(); |
| 1416 } | 1414 } |
| 1417 }; | 1415 }; |
| 1418 | 1416 |
| 1419 | 1417 |
| 1420 } } // namespace v8::internal | 1418 } } // namespace v8::internal |
| 1421 | 1419 |
| 1422 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1420 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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