Issue 9004017: MIPS: Clean up handling of global cell stores in the optimizing compiler.

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Issue 9004017: MIPS: Clean up handling of global cell stores in the optimizing compiler. (Closed)

Created:
9 years ago by kalmard

Modified:
9 years ago

Reviewers:
kisg, Paul Lind, Kevin Millikin (Chromium), danno

CC:
v8-dev

Visibility:
Public.

Description

MIPS: Clean up handling of global cell stores in the optimizing compiler. Port r10280 (5f6aec5). Original commit message: Tell the register allocator the value is not overwritten. Never use temporary registers on ia32, avoid them on x64 and ARM. Restore the original copyright date on assembler.cc. BUG= TEST= Committed: http://code.google.com/p/v8/source/detail?r=10281

Patch Set 1 #

Created: 9 years ago

	Unified diffs	Side-by-side diffs	Stats (+16 lines, -13 lines)
M	src/mips/lithium-codegen-mips.cc	View	1 chunk	+8 lines, -8 lines	0 comments
M	src/mips/lithium-mips.h	View	1 chunk	+2 lines, -0 lines	0 comments
M	src/mips/lithium-mips.cc	View	1 chunk	+6 lines, -5 lines	0 comments

Messages

Total messages: 2 (0 generated)

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Thanks for the patch.  LGTM and I will land it.

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