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Issue 888005: Fix issues with compiling V8 with LLVM Clang... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 9 months ago
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1 // Copyright 2006-2009 the V8 project authors. All rights reserved. 1 // Copyright 2006-2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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567 #if defined(__GNUC__) && !defined(DEBUG) 567 #if defined(__GNUC__) && !defined(DEBUG)
568 #if (__GNUC__ >= 4) 568 #if (__GNUC__ >= 4)
569 #define INLINE(header) inline header __attribute__((always_inline)) 569 #define INLINE(header) inline header __attribute__((always_inline))
570 #else 570 #else
571 #define INLINE(header) inline __attribute__((always_inline)) header 571 #define INLINE(header) inline __attribute__((always_inline)) header
572 #endif 572 #endif
573 #else 573 #else
574 #define INLINE(header) inline header 574 #define INLINE(header) inline header
575 #endif 575 #endif
576 576
577 // The type-based aliasing rule allows the compiler to assume that pointers of
578 // different types (for some definition of different) never alias each other.
579 // Thus the following code does not work:
580 //
581 // float f = foo();
582 // int fbits = *(int*)(&f);
583 //
584 // The compiler 'knows' that the int pointer can't refer to f since the types
585 // don't match, so the compiler may cache f in a register, leaving random data
586 // in fbits. Using C++ style casts makes no difference, however a pointer to
587 // char data is assumed to alias any other pointer. This is the 'memcpy
588 // exception'.
589 //
590 // Bit_cast uses the memcpy exception to move the bits from a variable of one
591 // type of a variable of another type. Of course the end result is likely to
592 // be implementation dependent. Most compilers (gcc-4.2 and MSVC 2005)
593 // will completely optimize bit_cast away.
594 //
595 // There is an additional use for bit_cast.
596 // Recent gccs will warn when they see casts that may result in breakage due to
597 // the type-based aliasing rule. If you have checked that there is no breakage
598 // you can use bit_cast to cast one pointer type to another. This confuses gcc
599 // enough that it can no longer see that you have cast one pointer type to
600 // another thus avoiding the warning.
601 template <class Dest, class Source>
602 inline Dest bit_cast(const Source& source) {
603 // Compile time assertion: sizeof(Dest) == sizeof(Source)
604 // A compile error here means your Dest and Source have different sizes.
605 typedef char VerifySizesAreEqual[sizeof(Dest) == sizeof(Source) ? 1 : -1];
606
607 Dest dest;
608 memcpy(&dest, &source, sizeof(dest));
609 return dest;
610 }
611
612
613 // Feature flags bit positions. They are mostly based on the CPUID spec. 577 // Feature flags bit positions. They are mostly based on the CPUID spec.
614 // (We assign CPUID itself to one of the currently reserved bits -- 578 // (We assign CPUID itself to one of the currently reserved bits --
615 // feel free to change this if needed.) 579 // feel free to change this if needed.)
616 enum CpuFeature { SSE3 = 32, // x86 580 enum CpuFeature { SSE3 = 32, // x86
617 SSE2 = 26, // x86 581 SSE2 = 26, // x86
618 CMOV = 15, // x86 582 CMOV = 15, // x86
619 RDTSC = 4, // x86 583 RDTSC = 4, // x86
620 CPUID = 10, // x86 584 CPUID = 10, // x86
621 VFP3 = 1, // ARM 585 VFP3 = 1, // ARM
622 ARMv7 = 2, // ARM 586 ARMv7 = 2, // ARM
623 SAHF = 0}; // x86 587 SAHF = 0}; // x86
624 588
625 } } // namespace v8::internal 589 } } // namespace v8::internal
626 590
627 #endif // V8_GLOBALS_H_ 591 #endif // V8_GLOBALS_H_
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