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1 // Copyright 2008 the V8 project authors. All rights reserved. | 1 // Copyright 2008 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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140 int32_t left, | 140 int32_t left, |
141 int32_t right, | 141 int32_t right, |
142 bool addition); | 142 bool addition); |
143 | 143 |
144 // Helper functions to decode common "addressing" modes | 144 // Helper functions to decode common "addressing" modes |
145 int32_t GetShiftRm(Instr* instr, bool* carry_out); | 145 int32_t GetShiftRm(Instr* instr, bool* carry_out); |
146 int32_t GetImm(Instr* instr, bool* carry_out); | 146 int32_t GetImm(Instr* instr, bool* carry_out); |
147 void HandleRList(Instr* instr, bool load); | 147 void HandleRList(Instr* instr, bool load); |
148 void SoftwareInterrupt(Instr* instr); | 148 void SoftwareInterrupt(Instr* instr); |
149 | 149 |
| 150 // Read and write memory. |
| 151 inline uint8_t ReadBU(int32_t addr); |
| 152 inline int8_t ReadB(int32_t addr); |
| 153 inline void WriteB(int32_t addr, uint8_t value); |
| 154 inline void WriteB(int32_t addr, int8_t value); |
| 155 |
| 156 inline uint16_t ReadHU(int32_t addr); |
| 157 inline int16_t ReadH(int32_t addr); |
| 158 inline void WriteH(int32_t addr, uint16_t value); |
| 159 inline void WriteH(int32_t addr, int16_t value); |
| 160 |
| 161 inline int ReadW(int32_t addr); |
| 162 inline void WriteW(int32_t addr, int value); |
| 163 |
150 // Executing is handled based on the instruction type. | 164 // Executing is handled based on the instruction type. |
151 void DecodeType01(Instr* instr); // both type 0 and type 1 rolled into one | 165 void DecodeType01(Instr* instr); // both type 0 and type 1 rolled into one |
152 void DecodeType2(Instr* instr); | 166 void DecodeType2(Instr* instr); |
153 void DecodeType3(Instr* instr); | 167 void DecodeType3(Instr* instr); |
154 void DecodeType4(Instr* instr); | 168 void DecodeType4(Instr* instr); |
155 void DecodeType5(Instr* instr); | 169 void DecodeType5(Instr* instr); |
156 void DecodeType6(Instr* instr); | 170 void DecodeType6(Instr* instr); |
157 void DecodeType7(Instr* instr); | 171 void DecodeType7(Instr* instr); |
158 | 172 |
159 // Executes one instruction. | 173 // Executes one instruction. |
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174 // registered breakpoints | 188 // registered breakpoints |
175 Instr* break_pc_; | 189 Instr* break_pc_; |
176 instr_t break_instr_; | 190 instr_t break_instr_; |
177 }; | 191 }; |
178 | 192 |
179 } } // namespace assembler::arm | 193 } } // namespace assembler::arm |
180 | 194 |
181 #endif // defined(__arm__) | 195 #endif // defined(__arm__) |
182 | 196 |
183 #endif // V8_SIMULATOR_ARM_H_ | 197 #endif // V8_SIMULATOR_ARM_H_ |
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