MIPS: Fixing MathPowHalf on ARM.

src/mips/lithium-codegen-mips.cc

Index: src/mips/lithium-codegen-mips.cc
diff --git a/src/mips/lithium-codegen-mips.cc b/src/mips/lithium-codegen-mips.cc
index 0af1f50a8e6498de99f5f5d8f0ca735e12a453e5..760ce30c2faeb686821aad25eae347bcc8ea2ba2 100644
--- a/src/mips/lithium-codegen-mips.cc
+++ b/src/mips/lithium-codegen-mips.cc
@@ -2996,13 +2996,24 @@ void LCodeGen::DoMathSqrt(LUnaryMathOperation* instr) {
 void LCodeGen::DoMathPowHalf(LUnaryMathOperation* instr) {
   DoubleRegister input = ToDoubleRegister(instr->InputAt(0));
   DoubleRegister result = ToDoubleRegister(instr->result());
-  DoubleRegister double_scratch = double_scratch0();
+  DoubleRegister temp = ToDoubleRegister(instr->TempAt(0));
+

[Yang, 2011/12/06 16:21:53]

From what I can see, you don't need to reserve an additional temp register (and
change register allocation in lithium-mips.cc) if you can already take advantage
of a double_scratch0().
Or is this double_scratch0() somehow related to kDoubleRegZero?

[kalmard, 2011/12/08 13:19:27]

I generally try to stick close to the ARM version because in my experience it
makes long-term maintenance easier. However if this has a performance impact or
you feel that the code is better the other way, I will obviously change it.
The change is not related to kDoubleRegZero.

+  ASSERT(!input.is(result));
+
+  // Note that according to ECMA-262 15.8.2.13:
+  // Math.pow(-Infinity, 0.5) == Infinity
+  // Math.sqrt(-Infinity) == NaN
+  Label done;
+  __ Move(temp, -V8_INFINITY);
+  __ BranchF(USE_DELAY_SLOT, &done, NULL, eq, temp, input);
+  // Set up Infinity in the delay slot.
+  // result is overwritten if the branch is not taken.
+  __ neg_d(result, temp);
 
   // Add +0 to convert -0 to +0.
-  __ mtc1(zero_reg, double_scratch.low());
-  __ mtc1(zero_reg, double_scratch.high());
-  __ add_d(result, input, double_scratch);
+  __ add_d(result, input, kDoubleRegZero);
   __ sqrt_d(result, result);
+  __ bind(&done);
 }