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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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629 // - Instructions on 32-bit (doubleword) operands/registers use 'l'. | 629 // - Instructions on 32-bit (doubleword) operands/registers use 'l'. |
630 // - Instructions on 64-bit (quadword) operands/registers use 'q'. | 630 // - Instructions on 64-bit (quadword) operands/registers use 'q'. |
631 // | 631 // |
632 // Some mnemonics, such as "and", are the same as C++ keywords. | 632 // Some mnemonics, such as "and", are the same as C++ keywords. |
633 // Naming conflicts with C++ keywords are resolved by adding a trailing '_'. | 633 // Naming conflicts with C++ keywords are resolved by adding a trailing '_'. |
634 | 634 |
635 // Insert the smallest number of nop instructions | 635 // Insert the smallest number of nop instructions |
636 // possible to align the pc offset to a multiple | 636 // possible to align the pc offset to a multiple |
637 // of m, where m must be a power of 2. | 637 // of m, where m must be a power of 2. |
638 void Align(int m); | 638 void Align(int m); |
| 639 void Nop(int bytes = 1); |
639 // Aligns code to something that's optimal for a jump target for the platform. | 640 // Aligns code to something that's optimal for a jump target for the platform. |
640 void CodeTargetAlign(); | 641 void CodeTargetAlign(); |
641 | 642 |
642 // Stack | 643 // Stack |
643 void pushfq(); | 644 void pushfq(); |
644 void popfq(); | 645 void popfq(); |
645 | 646 |
646 void push(Immediate value); | 647 void push(Immediate value); |
647 // Push a 32 bit integer, and guarantee that it is actually pushed as a | 648 // Push a 32 bit integer, and guarantee that it is actually pushed as a |
648 // 32 bit value, the normal push will optimize the 8 bit case. | 649 // 32 bit value, the normal push will optimize the 8 bit case. |
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1147 void bt(const Operand& dst, Register src); | 1148 void bt(const Operand& dst, Register src); |
1148 void bts(const Operand& dst, Register src); | 1149 void bts(const Operand& dst, Register src); |
1149 | 1150 |
1150 // Miscellaneous | 1151 // Miscellaneous |
1151 void clc(); | 1152 void clc(); |
1152 void cld(); | 1153 void cld(); |
1153 void cpuid(); | 1154 void cpuid(); |
1154 void hlt(); | 1155 void hlt(); |
1155 void int3(); | 1156 void int3(); |
1156 void nop(); | 1157 void nop(); |
1157 void nop(int n); | |
1158 void rdtsc(); | 1158 void rdtsc(); |
1159 void ret(int imm16); | 1159 void ret(int imm16); |
1160 void setcc(Condition cc, Register reg); | 1160 void setcc(Condition cc, Register reg); |
1161 | 1161 |
1162 // Label operations & relative jumps (PPUM Appendix D) | 1162 // Label operations & relative jumps (PPUM Appendix D) |
1163 // | 1163 // |
1164 // Takes a branch opcode (cc) and a label (L) and generates | 1164 // Takes a branch opcode (cc) and a label (L) and generates |
1165 // either a backward branch or a forward branch and links it | 1165 // either a backward branch or a forward branch and links it |
1166 // to the label fixup chain. Usage: | 1166 // to the label fixup chain. Usage: |
1167 // | 1167 // |
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1391 // an instruction or relocation information. | 1391 // an instruction or relocation information. |
1392 inline bool buffer_overflow() const { | 1392 inline bool buffer_overflow() const { |
1393 return pc_ >= reloc_info_writer.pos() - kGap; | 1393 return pc_ >= reloc_info_writer.pos() - kGap; |
1394 } | 1394 } |
1395 | 1395 |
1396 // Get the number of bytes available in the buffer. | 1396 // Get the number of bytes available in the buffer. |
1397 inline int available_space() const { | 1397 inline int available_space() const { |
1398 return static_cast<int>(reloc_info_writer.pos() - pc_); | 1398 return static_cast<int>(reloc_info_writer.pos() - pc_); |
1399 } | 1399 } |
1400 | 1400 |
1401 static bool IsNop(Address addr) { return *addr == 0x90; } | 1401 static bool IsNop(Address addr); |
1402 | 1402 |
1403 // Avoid overflows for displacements etc. | 1403 // Avoid overflows for displacements etc. |
1404 static const int kMaximalBufferSize = 512*MB; | 1404 static const int kMaximalBufferSize = 512*MB; |
1405 static const int kMinimalBufferSize = 4*KB; | 1405 static const int kMinimalBufferSize = 4*KB; |
1406 | 1406 |
1407 byte byte_at(int pos) { return buffer_[pos]; } | 1407 byte byte_at(int pos) { return buffer_[pos]; } |
1408 void set_byte_at(int pos, byte value) { buffer_[pos] = value; } | 1408 void set_byte_at(int pos, byte value) { buffer_[pos] = value; } |
1409 | 1409 |
1410 protected: | 1410 protected: |
1411 bool emit_debug_code() const { return emit_debug_code_; } | 1411 bool emit_debug_code() const { return emit_debug_code_; } |
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1641 private: | 1641 private: |
1642 Assembler* assembler_; | 1642 Assembler* assembler_; |
1643 #ifdef DEBUG | 1643 #ifdef DEBUG |
1644 int space_before_; | 1644 int space_before_; |
1645 #endif | 1645 #endif |
1646 }; | 1646 }; |
1647 | 1647 |
1648 } } // namespace v8::internal | 1648 } } // namespace v8::internal |
1649 | 1649 |
1650 #endif // V8_X64_ASSEMBLER_X64_H_ | 1650 #endif // V8_X64_ASSEMBLER_X64_H_ |
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