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Issue 8769037: Quickfix for DoMathPowHalf. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 9 years ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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2050 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { 2050 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
2051 ASSERT(CpuFeatures::IsEnabled(SSE2)); 2051 ASSERT(CpuFeatures::IsEnabled(SSE2));
2052 EnsureSpace ensure_space(this); 2052 EnsureSpace ensure_space(this);
2053 EMIT(0x66); 2053 EMIT(0x66);
2054 EMIT(0x0F); 2054 EMIT(0x0F);
2055 EMIT(0x2E); 2055 EMIT(0x2E);
2056 emit_sse_operand(dst, src); 2056 emit_sse_operand(dst, src);
2057 } 2057 }
2058 2058
2059 2059
2060 void Assembler::ucomisd(XMMRegister dst, const Operand& src) {
2061 ASSERT(CpuFeatures::IsEnabled(SSE2));
2062 EnsureSpace ensure_space(this);
2063 EMIT(0x66);
2064 EMIT(0x0F);
2065 EMIT(0x2E);
2066 emit_sse_operand(dst, src);
2067 }
2068
2069
2060 void Assembler::roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode) { 2070 void Assembler::roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode) {
2061 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); 2071 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2062 EnsureSpace ensure_space(this); 2072 EnsureSpace ensure_space(this);
2063 EMIT(0x66); 2073 EMIT(0x66);
2064 EMIT(0x0F); 2074 EMIT(0x0F);
2065 EMIT(0x3A); 2075 EMIT(0x3A);
2066 EMIT(0x0B); 2076 EMIT(0x0B);
2067 emit_sse_operand(dst, src); 2077 emit_sse_operand(dst, src);
2068 // Mask precision exeption. 2078 // Mask precision exeption.
2069 EMIT(static_cast<byte>(mode) | 0x8); 2079 EMIT(static_cast<byte>(mode) | 0x8);
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2610 fprintf(coverage_log, "%s\n", file_line); 2620 fprintf(coverage_log, "%s\n", file_line);
2611 fflush(coverage_log); 2621 fflush(coverage_log);
2612 } 2622 }
2613 } 2623 }
2614 2624
2615 #endif 2625 #endif
2616 2626
2617 } } // namespace v8::internal 2627 } } // namespace v8::internal
2618 2628
2619 #endif // V8_TARGET_ARCH_IA32 2629 #endif // V8_TARGET_ARCH_IA32
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