Index: src/ia32/disasm-ia32.cc |
diff --git a/src/ia32/disasm-ia32.cc b/src/ia32/disasm-ia32.cc |
index da223901193f77234ad7be857477b0a36cc2e8a8..643789f4c7f6c0bf4cf408293b47014e3436cdca 100644 |
--- a/src/ia32/disasm-ia32.cc |
+++ b/src/ia32/disasm-ia32.cc |
@@ -763,10 +763,13 @@ int DisassemblerIA32::RegisterFPUInstruction(int escape_opcode, |
case 0xEB: mnem = "fldpi"; break; |
case 0xED: mnem = "fldln2"; break; |
case 0xEE: mnem = "fldz"; break; |
+ case 0xF0: mnem = "f2xm1"; break; |
case 0xF1: mnem = "fyl2x"; break; |
case 0xF5: mnem = "fprem1"; break; |
case 0xF7: mnem = "fincstp"; break; |
case 0xF8: mnem = "fprem"; break; |
+ case 0xFC: mnem = "frndint"; break; |
+ case 0xFD: mnem = "fscale"; break; |
case 0xFE: mnem = "fsin"; break; |
case 0xFF: mnem = "fcos"; break; |
default: UnimplementedInstruction(); |
@@ -788,6 +791,8 @@ int DisassemblerIA32::RegisterFPUInstruction(int escape_opcode, |
has_register = true; |
} else if (modrm_byte == 0xE2) { |
mnem = "fclex"; |
+ } else if (modrm_byte == 0xE3) { |
+ mnem = "fninit"; |
} else { |
UnimplementedInstruction(); |
} |
@@ -1185,6 +1190,16 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
NameOfXMMRegister(rm), |
static_cast<int>(imm8)); |
data += 2; |
+ } else if (*data == 0x17){ |
+ data++; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ int8_t imm8 = static_cast<int8_t>(data[1]); |
+ AppendToBuffer("extractps %s,%s,%d", |
+ NameOfCPURegister(regop), |
+ NameOfXMMRegister(rm), |
+ static_cast<int>(imm8)); |
+ data += 2; |
} else if (*data == 0x22) { |
data++; |
int mod, regop, rm; |