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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 36 #include "v8.h" | 36 #include "v8.h" |
| 37 | 37 |
| 38 #if defined(V8_TARGET_ARCH_MIPS) | 38 #if defined(V8_TARGET_ARCH_MIPS) |
| 39 | 39 |
| 40 #include "mips/assembler-mips-inl.h" | 40 #include "mips/assembler-mips-inl.h" |
| 41 #include "serialize.h" | 41 #include "serialize.h" |
| 42 | 42 |
| 43 namespace v8 { | 43 namespace v8 { |
| 44 namespace internal { | 44 namespace internal { |
| 45 | 45 |
| 46 const FPURegister& kDoubleRegZero = f28; |
| 47 |
| 46 #ifdef DEBUG | 48 #ifdef DEBUG |
| 47 bool CpuFeatures::initialized_ = false; | 49 bool CpuFeatures::initialized_ = false; |
| 48 #endif | 50 #endif |
| 49 unsigned CpuFeatures::supported_ = 0; | 51 unsigned CpuFeatures::supported_ = 0; |
| 50 unsigned CpuFeatures::found_by_runtime_probing_ = 0; | 52 unsigned CpuFeatures::found_by_runtime_probing_ = 0; |
| 51 | 53 |
| 52 | 54 |
| 53 // Get the CPU features enabled by the build. For cross compilation the | 55 // Get the CPU features enabled by the build. For cross compilation the |
| 54 // preprocessor symbols CAN_USE_FPU_INSTRUCTIONS | 56 // preprocessor symbols CAN_USE_FPU_INSTRUCTIONS |
| 55 // can be defined to enable FPU instructions when building the | 57 // can be defined to enable FPU instructions when building the |
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| 2267 } | 2269 } |
| 2268 | 2270 |
| 2269 if (patched) { | 2271 if (patched) { |
| 2270 CPU::FlushICache(pc+2, sizeof(Address)); | 2272 CPU::FlushICache(pc+2, sizeof(Address)); |
| 2271 } | 2273 } |
| 2272 } | 2274 } |
| 2273 | 2275 |
| 2274 } } // namespace v8::internal | 2276 } } // namespace v8::internal |
| 2275 | 2277 |
| 2276 #endif // V8_TARGET_ARCH_MIPS | 2278 #endif // V8_TARGET_ARCH_MIPS |
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