Chromium Code Reviews| Index: src/mips/macro-assembler-mips.cc |
| diff --git a/src/mips/macro-assembler-mips.cc b/src/mips/macro-assembler-mips.cc |
| index c9f4d4b5cdb5664c99461e893af00534b9e181ed..3e892d7fead624a213e953bd7a3769f645d67135 100644 |
| --- a/src/mips/macro-assembler-mips.cc |
| +++ b/src/mips/macro-assembler-mips.cc |
| @@ -2695,34 +2695,11 @@ void MacroAssembler::ThrowUncatchable(UncatchableExceptionType type, |
| STATIC_ASSERT(StackHandlerConstants::kFPOffset == 3 * kPointerSize); |
| STATIC_ASSERT(StackHandlerConstants::kPCOffset == 4 * kPointerSize); |
| - // v0 is expected to hold the exception. |
| - Move(v0, value); |
| - |
| - // Drop sp to the top stack handler. |
| - li(a3, Operand(ExternalReference(Isolate::kHandlerAddress, isolate()))); |
| - lw(sp, MemOperand(a3)); |
| - |
| - // Unwind the handlers until the ENTRY handler is found. |
| - Label loop, done; |
| - bind(&loop); |
| - // Load the type of the current stack handler. |
| - const int kStateOffset = StackHandlerConstants::kStateOffset; |
| - lw(a2, MemOperand(sp, kStateOffset)); |
| - Branch(&done, eq, a2, Operand(StackHandler::ENTRY)); |
| - // Fetch the next handler in the list. |
| - const int kNextOffset = StackHandlerConstants::kNextOffset; |
| - lw(sp, MemOperand(sp, kNextOffset)); |
| - jmp(&loop); |
| - bind(&done); |
| - |
| - // Set the top handler address to next handler past the current ENTRY handler. |
| - pop(a2); |
| - sw(a2, MemOperand(a3)); |
| - |
| + // The exception is expected in v0. |
| if (type == OUT_OF_MEMORY) { |
| // Set external caught exception to false. |
| - ExternalReference external_caught( |
| - Isolate::kExternalCaughtExceptionAddress, isolate()); |
| + ExternalReference external_caught(Isolate::kExternalCaughtExceptionAddress, |
| + isolate()); |
| li(a0, Operand(false, RelocInfo::NONE)); |
| li(a2, Operand(external_caught)); |
| sw(a0, MemOperand(a2)); |
| @@ -2733,43 +2710,34 @@ void MacroAssembler::ThrowUncatchable(UncatchableExceptionType type, |
| li(a2, Operand(ExternalReference(Isolate::kPendingExceptionAddress, |
| isolate()))); |
|
Kevin Millikin (Chromium)
2011/11/09 11:03:10
Indentation was off here, I'll fix it.
|
| sw(v0, MemOperand(a2)); |
| + } else if (!value.is(v0)) { |
| + mov(v0, value); |
| } |
| - // Stack layout at this point. See also StackHandlerConstants. |
| - // sp -> state (ENTRY) |
| - // cp |
| - // fp |
| - // ra |
| + // Drop the stack pointer to the top of the top stack handler. |
| + li(a3, Operand(ExternalReference(Isolate::kHandlerAddress, isolate()))); |
| + lw(sp, MemOperand(a3)); |
| - // Restore context and frame pointer, discard state (r2). |
| - MultiPop(a2.bit() | cp.bit() | fp.bit()); |
| + // Unwind the handlers until the top ENTRY handler is found. |
| + Label fetch_next, check_kind; |
| + jmp(&check_kind); |
| + bind(&fetch_next); |
| + lw(sp, MemOperand(sp, StackHandlerConstants::kNextOffset)); |
| -#ifdef DEBUG |
| - // When emitting debug_code, set ra as return address for the jump. |
| - // 5 instructions: add: 1, pop: 2, jump: 2. |
| - const int kOffsetRaInstructions = 5; |
| - Label find_ra; |
| + bind(&check_kind); |
| + lw(a2, MemOperand(sp, StackHandlerConstants::kStateOffset)); |
| + Branch(&fetch_next, ne, a2, Operand(StackHandler::ENTRY)); |
| - if (emit_debug_code()) { |
| - // Compute ra for the Jump(t9). |
| - const int kOffsetRaBytes = kOffsetRaInstructions * Assembler::kInstrSize; |
| + // Set the top handler address to next handler past the top ENTRY handler. |
| + pop(a2); |
| + sw(a2, MemOperand(a3)); |
| + |
| + // Clear the context and frame pointer (0 was saved in the handler), and |
| + // discard the state (a2). |
| + MultiPop(a2.bit() | cp.bit() | fp.bit()); |
| - // This branch-and-link sequence is needed to get the current PC on mips, |
| - // saved to the ra register. Then adjusted for instruction count. |
| - bal(&find_ra); // bal exposes branch-delay slot. |
| - nop(); // Branch delay slot nop. |
| - bind(&find_ra); |
| - addiu(ra, ra, kOffsetRaBytes); |
| - } |
| -#endif |
| pop(t9); // 2 instructions: lw, add sp. |
| Jump(t9); // 2 instructions: jr, nop (in delay slot). |
| - |
| - if (emit_debug_code()) { |
| - // Make sure that the expected number of instructions were generated. |
| - ASSERT_EQ(kOffsetRaInstructions, |
| - InstructionsGeneratedSince(&find_ra)); |
| - } |
| } |