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1 # Copyright 2011 the V8 project authors. All rights reserved. | 1 # Copyright 2011 the V8 project authors. All rights reserved. |
2 # Redistribution and use in source and binary forms, with or without | 2 # Redistribution and use in source and binary forms, with or without |
3 # modification, are permitted provided that the following conditions are | 3 # modification, are permitted provided that the following conditions are |
4 # met: | 4 # met: |
5 # | 5 # |
6 # * Redistributions of source code must retain the above copyright | 6 # * Redistributions of source code must retain the above copyright |
7 # notice, this list of conditions and the following disclaimer. | 7 # notice, this list of conditions and the following disclaimer. |
8 # * Redistributions in binary form must reproduce the above | 8 # * Redistributions in binary form must reproduce the above |
9 # copyright notice, this list of conditions and the following | 9 # copyright notice, this list of conditions and the following |
10 # disclaimer in the documentation and/or other materials provided | 10 # disclaimer in the documentation and/or other materials provided |
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43 # access is allowed for all CPUs. | 43 # access is allowed for all CPUs. |
44 'v8_can_use_unaligned_accesses%': 'default', | 44 'v8_can_use_unaligned_accesses%': 'default', |
45 | 45 |
46 # Setting 'v8_can_use_vfp_instructions' to 'true' will enable use of ARM VFP | 46 # Setting 'v8_can_use_vfp_instructions' to 'true' will enable use of ARM VFP |
47 # instructions in the V8 generated code. VFP instructions will be enabled | 47 # instructions in the V8 generated code. VFP instructions will be enabled |
48 # both for the snapshot and for the ARM target. Leaving the default value | 48 # both for the snapshot and for the ARM target. Leaving the default value |
49 # of 'false' will avoid VFP instructions in the snapshot and use CPU feature | 49 # of 'false' will avoid VFP instructions in the snapshot and use CPU feature |
50 # probing when running on the target. | 50 # probing when running on the target. |
51 'v8_can_use_vfp_instructions%': 'false', | 51 'v8_can_use_vfp_instructions%': 'false', |
52 | 52 |
| 53 # Similar to vfp but on MIPS. |
| 54 'v8_can_use_fpu_instructions%': 'true', |
| 55 |
53 # Setting v8_use_arm_eabi_hardfloat to true will turn on V8 support for ARM | 56 # Setting v8_use_arm_eabi_hardfloat to true will turn on V8 support for ARM |
54 # EABI calling convention where double arguments are passed in VFP | 57 # EABI calling convention where double arguments are passed in VFP |
55 # registers. Note that the GCC flag '-mfloat-abi=hard' should be used as | 58 # registers. Note that the GCC flag '-mfloat-abi=hard' should be used as |
56 # well when compiling for the ARM target. | 59 # well when compiling for the ARM target. |
57 'v8_use_arm_eabi_hardfloat%': 'false', | 60 'v8_use_arm_eabi_hardfloat%': 'false', |
58 | 61 |
| 62 # Similar to the ARM hard float ABI but on MIPS. |
| 63 'v8_use_mips_abi_hardfloat%': 'true', |
| 64 |
59 'v8_enable_debugger_support%': 1, | 65 'v8_enable_debugger_support%': 1, |
60 | 66 |
61 'v8_enable_disassembler%': 0, | 67 'v8_enable_disassembler%': 0, |
62 | 68 |
63 'v8_object_print%': 0, | 69 'v8_object_print%': 0, |
64 | 70 |
65 'v8_enable_gdbjit%': 0, | 71 'v8_enable_gdbjit%': 0, |
66 | 72 |
67 # Enable profiling support. Only required on Windows. | 73 # Enable profiling support. Only required on Windows. |
68 'v8_enable_prof%': 0, | 74 'v8_enable_prof%': 0, |
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147 }], | 153 }], |
148 ['v8_target_arch=="ia32"', { | 154 ['v8_target_arch=="ia32"', { |
149 'defines': [ | 155 'defines': [ |
150 'V8_TARGET_ARCH_IA32', | 156 'V8_TARGET_ARCH_IA32', |
151 ], | 157 ], |
152 }], | 158 }], |
153 ['v8_target_arch=="mips"', { | 159 ['v8_target_arch=="mips"', { |
154 'defines': [ | 160 'defines': [ |
155 'V8_TARGET_ARCH_MIPS', | 161 'V8_TARGET_ARCH_MIPS', |
156 ], | 162 ], |
| 163 'conditions': [ |
| 164 [ 'v8_can_use_fpu_instructions=="true"', { |
| 165 'defines': [ |
| 166 'CAN_USE_FPU_INSTRUCTIONS', |
| 167 ], |
| 168 }], |
| 169 [ 'v8_use_mips_abi_hardfloat=="true"', { |
| 170 'defines': [ |
| 171 '__mips_hard_float=1', |
| 172 'CAN_USE_FPU_INSTRUCTIONS', |
| 173 ], |
| 174 }, { |
| 175 'defines': [ |
| 176 '__mips_soft_float=1' |
| 177 ], |
| 178 }], |
| 179 # The MIPS assembler assumes the host is 32 bits, |
| 180 # so force building 32-bit host tools. |
| 181 ['host_arch=="x64"', { |
| 182 'target_conditions': [ |
| 183 ['_toolset=="host"', { |
| 184 'cflags': ['-m32'], |
| 185 'ldflags': ['-m32'], |
| 186 }], |
| 187 ], |
| 188 }], |
| 189 ], |
157 }], | 190 }], |
158 ['v8_target_arch=="x64"', { | 191 ['v8_target_arch=="x64"', { |
159 'defines': [ | 192 'defines': [ |
160 'V8_TARGET_ARCH_X64', | 193 'V8_TARGET_ARCH_X64', |
161 ], | 194 ], |
162 }], | 195 }], |
163 ], | 196 ], |
164 }], | 197 }], |
165 ['v8_use_liveobjectlist=="true"', { | 198 ['v8_use_liveobjectlist=="true"', { |
166 'defines': [ | 199 'defines': [ |
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301 # some test cases can cause stack overflow. | 334 # some test cases can cause stack overflow. |
302 # 'StackReserveSize': '297152', | 335 # 'StackReserveSize': '297152', |
303 }, | 336 }, |
304 }, | 337 }, |
305 }], | 338 }], |
306 ], | 339 ], |
307 }, | 340 }, |
308 }, | 341 }, |
309 }, | 342 }, |
310 } | 343 } |
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