MIPS: Initial gyp infrastructure for MIPS architecture.

build/common.gypi

 # Copyright 2011 the V8 project authors. All rights reserved.
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are
 # met:
 #
 #     * Redistributions of source code must retain the above copyright
 #       notice, this list of conditions and the following disclaimer.
 #     * Redistributions in binary form must reproduce the above
 #       copyright notice, this list of conditions and the following
 #       disclaimer in the documentation and/or other materials provided
@@ skipping 32 matching lines @@
     # access is allowed for all CPUs.
     'v8_can_use_unaligned_accesses%': 'default',
 
     # Setting 'v8_can_use_vfp_instructions' to 'true' will enable use of ARM VFP
     # instructions in the V8 generated code. VFP instructions will be enabled
     # both for the snapshot and for the ARM target. Leaving the default value
     # of 'false' will avoid VFP instructions in the snapshot and use CPU feature
     # probing when running on the target.
     'v8_can_use_vfp_instructions%': 'false',
 
+    # Similar to vfp but on MIPS.
+    'v8_can_use_fpu_instructions%': 'true',
+
     # Setting v8_use_arm_eabi_hardfloat to true will turn on V8 support for ARM
     # EABI calling convention where double arguments are passed in VFP
     # registers. Note that the GCC flag '-mfloat-abi=hard' should be used as
     # well when compiling for the ARM target.
     'v8_use_arm_eabi_hardfloat%': 'false',
 
+    # Similar to the ARM hard float ABI but on MIPS.
+    'v8_use_mips_abi_hardfloat%': 'true',
+
     'v8_enable_debugger_support%': 1,
 
     'v8_enable_disassembler%': 0,
 
     'v8_object_print%': 0,
 
     'v8_enable_gdbjit%': 0,
 
     # Enable profiling support. Only required on Windows.
     'v8_enable_prof%': 0,
@@ skipping 78 matching lines @@
           }],
           ['v8_target_arch=="ia32"', {
             'defines': [
               'V8_TARGET_ARCH_IA32',
             ],
           }],
           ['v8_target_arch=="mips"', {
             'defines': [
               'V8_TARGET_ARCH_MIPS',
             ],
+            'conditions': [
+              [ 'v8_can_use_fpu_instructions=="true"', {
+                'defines': [
+                  'CAN_USE_FPU_INSTRUCTIONS',
+                ],
+              }],
+              [ 'v8_use_mips_abi_hardfloat=="true"', {
+                'defines': [
+                  '__mips_hard_float=1',
+                  'CAN_USE_FPU_INSTRUCTIONS',
+                ],
+              }, {
+                'defines': [
+                  '__mips_soft_float=1'
+                ],
+              }],
+              # The MIPS assembler assumes the host is 32 bits,
+              # so force building 32-bit host tools.
+              ['host_arch=="x64"', {
+                'target_conditions': [
+                  ['_toolset=="host"', {
+                    'cflags': ['-m32'],
+                    'ldflags': ['-m32'],
+                  }],
+                ],
+              }],
+            ],
           }],
           ['v8_target_arch=="x64"', {
             'defines': [
               'V8_TARGET_ARCH_X64',
             ],
           }],
         ],
       }],
       ['v8_use_liveobjectlist=="true"', {
         'defines': [
@@ skipping 134 matching lines @@
                 # some test cases can cause stack overflow.
                 # 'StackReserveSize': '297152',
               },
             },
           }],
         ],
       },
     },
   },
 }