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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 1721 Label* false_label = chunk_->GetAssemblyLabel(false_block); | 1721 Label* false_label = chunk_->GetAssemblyLabel(false_block); |
| 1722 | 1722 |
| 1723 Condition true_cond = | 1723 Condition true_cond = |
| 1724 EmitIsObject(reg, temp1, false_label, true_label); | 1724 EmitIsObject(reg, temp1, false_label, true_label); |
| 1725 | 1725 |
| 1726 EmitBranch(true_block, false_block, true_cond, temp2, | 1726 EmitBranch(true_block, false_block, true_cond, temp2, |
| 1727 Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE)); | 1727 Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE)); |
| 1728 } | 1728 } |
| 1729 | 1729 |
| 1730 | 1730 |
| 1731 Condition LCodeGen::EmitIsString(Register input, | |
| 1732 Register temp1, | |
| 1733 Label* is_not_string, | |
| 1734 Label* is_string) { | |
| 1735 __ JumpIfSmi(input, is_not_string); | |
| 1736 __ GetObjectType(input, temp1, temp1); | |
| 1737 __ Branch(is_not_string, ge, temp1, Operand(FIRST_NONSTRING_TYPE)); | |
| 1738 | |
| 1739 return lt; | |
| 1740 } | |
| 1741 | |
| 1742 | |
| 1743 void LCodeGen::DoIsStringAndBranch(LIsStringAndBranch* instr) { | |
| 1744 Register reg = ToRegister(instr->InputAt(0)); | |
| 1745 Register temp1 = ToRegister(instr->TempAt(0)); | |
| 1746 Register temp2 = scratch0(); | |
| 1747 | |
| 1748 int true_block = chunk_->LookupDestination(instr->true_block_id()); | |
| 1749 int false_block = chunk_->LookupDestination(instr->false_block_id()); | |
| 1750 Label* true_label = chunk_->GetAssemblyLabel(true_block); | |
| 1751 Label* false_label = chunk_->GetAssemblyLabel(false_block); | |
| 1752 | |
| 1753 Condition true_cond = | |
| 1754 EmitIsString(reg, temp1, false_label, true_label); | |
| 1755 | |
| 1756 EmitBranch(true_block, false_block, true_cond, temp2, | |
| 1757 Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE)); | |
| 1758 } | |
| 1759 | |
| 1760 | |
| 1761 void LCodeGen::DoIsSmiAndBranch(LIsSmiAndBranch* instr) { | 1731 void LCodeGen::DoIsSmiAndBranch(LIsSmiAndBranch* instr) { |
| 1762 int true_block = chunk_->LookupDestination(instr->true_block_id()); | 1732 int true_block = chunk_->LookupDestination(instr->true_block_id()); |
| 1763 int false_block = chunk_->LookupDestination(instr->false_block_id()); | 1733 int false_block = chunk_->LookupDestination(instr->false_block_id()); |
| 1764 | 1734 |
| 1765 Register input_reg = EmitLoadRegister(instr->InputAt(0), at); | 1735 Register input_reg = EmitLoadRegister(instr->InputAt(0), at); |
| 1766 __ And(at, input_reg, kSmiTagMask); | 1736 __ And(at, input_reg, kSmiTagMask); |
| 1767 EmitBranch(true_block, false_block, eq, at, Operand(zero_reg)); | 1737 EmitBranch(true_block, false_block, eq, at, Operand(zero_reg)); |
| 1768 } | 1738 } |
| 1769 | 1739 |
| 1770 | 1740 |
| 1771 void LCodeGen::DoIsUndetectableAndBranch(LIsUndetectableAndBranch* instr) { | 1741 void LCodeGen::DoIsUndetectableAndBranch(LIsUndetectableAndBranch* instr) { |
| 1772 Register input = ToRegister(instr->InputAt(0)); | 1742 Register input = ToRegister(instr->InputAt(0)); |
| 1773 Register temp = ToRegister(instr->TempAt(0)); | 1743 Register temp = ToRegister(instr->TempAt(0)); |
| 1774 | 1744 |
| 1775 int true_block = chunk_->LookupDestination(instr->true_block_id()); | 1745 int true_block = chunk_->LookupDestination(instr->true_block_id()); |
| 1776 int false_block = chunk_->LookupDestination(instr->false_block_id()); | 1746 int false_block = chunk_->LookupDestination(instr->false_block_id()); |
| 1777 | 1747 |
| 1778 __ JumpIfSmi(input, chunk_->GetAssemblyLabel(false_block)); | 1748 __ JumpIfSmi(input, chunk_->GetAssemblyLabel(false_block)); |
| 1779 __ lw(temp, FieldMemOperand(input, HeapObject::kMapOffset)); | 1749 __ lw(temp, FieldMemOperand(input, HeapObject::kMapOffset)); |
| 1780 __ lbu(temp, FieldMemOperand(temp, Map::kBitFieldOffset)); | 1750 __ lbu(temp, FieldMemOperand(temp, Map::kBitFieldOffset)); |
| 1781 __ And(at, temp, Operand(1 << Map::kIsUndetectable)); | 1751 __ And(at, temp, Operand(1 << Map::kIsUndetectable)); |
| 1782 EmitBranch(true_block, false_block, ne, at, Operand(zero_reg)); | 1752 EmitBranch(true_block, false_block, ne, at, Operand(zero_reg)); |
| 1783 } | 1753 } |
| 1784 | 1754 |
| 1785 | 1755 |
| 1786 static Condition ComputeCompareCondition(Token::Value op) { | |
| 1787 switch (op) { | |
| 1788 case Token::EQ_STRICT: | |
| 1789 case Token::EQ: | |
| 1790 return eq; | |
| 1791 case Token::LT: | |
| 1792 return lt; | |
| 1793 case Token::GT: | |
| 1794 return gt; | |
| 1795 case Token::LTE: | |
| 1796 return le; | |
| 1797 case Token::GTE: | |
| 1798 return ge; | |
| 1799 default: | |
| 1800 UNREACHABLE(); | |
| 1801 return kNoCondition; | |
| 1802 } | |
| 1803 } | |
| 1804 | |
| 1805 | |
| 1806 void LCodeGen::DoStringCompareAndBranch(LStringCompareAndBranch* instr) { | |
| 1807 Token::Value op = instr->op(); | |
| 1808 int true_block = chunk_->LookupDestination(instr->true_block_id()); | |
| 1809 int false_block = chunk_->LookupDestination(instr->false_block_id()); | |
| 1810 | |
| 1811 Handle<Code> ic = CompareIC::GetUninitialized(op); | |
| 1812 CallCode(ic, RelocInfo::CODE_TARGET, instr); | |
| 1813 // On MIPS there is no need for a "no inlined smi code" marker (nop). | |
| 1814 | |
| 1815 Condition condition = ComputeCompareCondition(op); | |
| 1816 | |
| 1817 EmitBranch(true_block, false_block, condition, at, | |
| 1818 Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE)); | |
| 1819 } | |
| 1820 | |
| 1821 | |
| 1822 static InstanceType TestType(HHasInstanceTypeAndBranch* instr) { | 1756 static InstanceType TestType(HHasInstanceTypeAndBranch* instr) { |
| 1823 InstanceType from = instr->from(); | 1757 InstanceType from = instr->from(); |
| 1824 InstanceType to = instr->to(); | 1758 InstanceType to = instr->to(); |
| 1825 if (from == FIRST_TYPE) return to; | 1759 if (from == FIRST_TYPE) return to; |
| 1826 ASSERT(from == to || to == LAST_TYPE); | 1760 ASSERT(from == to || to == LAST_TYPE); |
| 1827 return from; | 1761 return from; |
| 1828 } | 1762 } |
| 1829 | 1763 |
| 1830 | 1764 |
| 1831 static Condition BranchCondition(HHasInstanceTypeAndBranch* instr) { | 1765 static Condition BranchCondition(HHasInstanceTypeAndBranch* instr) { |
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| 2109 CallCodeGeneric(stub.GetCode(), | 2043 CallCodeGeneric(stub.GetCode(), |
| 2110 RelocInfo::CODE_TARGET, | 2044 RelocInfo::CODE_TARGET, |
| 2111 instr, | 2045 instr, |
| 2112 RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS); | 2046 RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS); |
| 2113 // Put the result value into the result register slot and | 2047 // Put the result value into the result register slot and |
| 2114 // restore all registers. | 2048 // restore all registers. |
| 2115 __ StoreToSafepointRegisterSlot(result, result); | 2049 __ StoreToSafepointRegisterSlot(result, result); |
| 2116 } | 2050 } |
| 2117 | 2051 |
| 2118 | 2052 |
| 2053 static Condition ComputeCompareCondition(Token::Value op) { |
| 2054 switch (op) { |
| 2055 case Token::EQ_STRICT: |
| 2056 case Token::EQ: |
| 2057 return eq; |
| 2058 case Token::LT: |
| 2059 return lt; |
| 2060 case Token::GT: |
| 2061 return gt; |
| 2062 case Token::LTE: |
| 2063 return le; |
| 2064 case Token::GTE: |
| 2065 return ge; |
| 2066 default: |
| 2067 UNREACHABLE(); |
| 2068 return kNoCondition; |
| 2069 } |
| 2070 } |
| 2071 |
| 2072 |
| 2119 void LCodeGen::DoCmpT(LCmpT* instr) { | 2073 void LCodeGen::DoCmpT(LCmpT* instr) { |
| 2120 Token::Value op = instr->op(); | 2074 Token::Value op = instr->op(); |
| 2121 | 2075 |
| 2122 Handle<Code> ic = CompareIC::GetUninitialized(op); | 2076 Handle<Code> ic = CompareIC::GetUninitialized(op); |
| 2123 CallCode(ic, RelocInfo::CODE_TARGET, instr); | 2077 CallCode(ic, RelocInfo::CODE_TARGET, instr); |
| 2124 // On MIPS there is no need for a "no inlined smi code" marker (nop). | 2078 // On MIPS there is no need for a "no inlined smi code" marker (nop). |
| 2125 | 2079 |
| 2126 Condition condition = ComputeCompareCondition(op); | 2080 Condition condition = ComputeCompareCondition(op); |
| 2127 // A minor optimization that relies on LoadRoot always emitting one | 2081 // A minor optimization that relies on LoadRoot always emitting one |
| 2128 // instruction. | 2082 // instruction. |
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| 4665 ASSERT(!environment->HasBeenRegistered()); | 4619 ASSERT(!environment->HasBeenRegistered()); |
| 4666 RegisterEnvironmentForDeoptimization(environment); | 4620 RegisterEnvironmentForDeoptimization(environment); |
| 4667 ASSERT(osr_pc_offset_ == -1); | 4621 ASSERT(osr_pc_offset_ == -1); |
| 4668 osr_pc_offset_ = masm()->pc_offset(); | 4622 osr_pc_offset_ = masm()->pc_offset(); |
| 4669 } | 4623 } |
| 4670 | 4624 |
| 4671 | 4625 |
| 4672 #undef __ | 4626 #undef __ |
| 4673 | 4627 |
| 4674 } } // namespace v8::internal | 4628 } } // namespace v8::internal |
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