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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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172 const char* mnem; | 172 const char* mnem; |
173 InstructionType type; | 173 InstructionType type; |
174 OperandOrder op_order_; | 174 OperandOrder op_order_; |
175 }; | 175 }; |
176 | 176 |
177 | 177 |
178 class InstructionTable { | 178 class InstructionTable { |
179 public: | 179 public: |
180 InstructionTable(); | 180 InstructionTable(); |
181 const InstructionDesc& Get(byte x) const { return instructions_[x]; } | 181 const InstructionDesc& Get(byte x) const { return instructions_[x]; } |
| 182 static InstructionTable* get_instance() { |
| 183 static InstructionTable table; |
| 184 return &table; |
| 185 } |
182 | 186 |
183 private: | 187 private: |
184 InstructionDesc instructions_[256]; | 188 InstructionDesc instructions_[256]; |
185 void Clear(); | 189 void Clear(); |
186 void Init(); | 190 void Init(); |
187 void CopyTable(const ByteMnemonic bm[], InstructionType type); | 191 void CopyTable(const ByteMnemonic bm[], InstructionType type); |
188 void SetTableRange(InstructionType type, | 192 void SetTableRange(InstructionType type, |
189 byte start, | 193 byte start, |
190 byte end, | 194 byte end, |
191 const char* mnem); | 195 const char* mnem); |
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252 void InstructionTable::AddJumpConditionalShort() { | 256 void InstructionTable::AddJumpConditionalShort() { |
253 for (byte b = 0x70; b <= 0x7F; b++) { | 257 for (byte b = 0x70; b <= 0x7F; b++) { |
254 InstructionDesc* id = &instructions_[b]; | 258 InstructionDesc* id = &instructions_[b]; |
255 ASSERT_EQ(NO_INSTR, id->type); // Information not already entered. | 259 ASSERT_EQ(NO_INSTR, id->type); // Information not already entered. |
256 id->mnem = jump_conditional_mnem[b & 0x0F]; | 260 id->mnem = jump_conditional_mnem[b & 0x0F]; |
257 id->type = JUMP_CONDITIONAL_SHORT_INSTR; | 261 id->type = JUMP_CONDITIONAL_SHORT_INSTR; |
258 } | 262 } |
259 } | 263 } |
260 | 264 |
261 | 265 |
262 static InstructionTable instruction_table; | |
263 | |
264 | |
265 // The IA32 disassembler implementation. | 266 // The IA32 disassembler implementation. |
266 class DisassemblerIA32 { | 267 class DisassemblerIA32 { |
267 public: | 268 public: |
268 DisassemblerIA32(const NameConverter& converter, | 269 DisassemblerIA32(const NameConverter& converter, |
269 bool abort_on_unimplemented = true) | 270 bool abort_on_unimplemented = true) |
270 : converter_(converter), | 271 : instruction_table_(InstructionTabel::get_instance()), |
| 272 converter_(converter), |
271 tmp_buffer_pos_(0), | 273 tmp_buffer_pos_(0), |
272 abort_on_unimplemented_(abort_on_unimplemented) { | 274 abort_on_unimplemented_(abort_on_unimplemented) { |
273 tmp_buffer_[0] = '\0'; | 275 tmp_buffer_[0] = '\0'; |
274 } | 276 } |
275 | 277 |
276 virtual ~DisassemblerIA32() {} | 278 virtual ~DisassemblerIA32() {} |
277 | 279 |
278 // Writes one disassembled instruction into 'buffer' (0-terminated). | 280 // Writes one disassembled instruction into 'buffer' (0-terminated). |
279 // Returns the length of the disassembled machine instruction in bytes. | 281 // Returns the length of the disassembled machine instruction in bytes. |
280 int InstructionDecode(v8::internal::Vector<char> buffer, byte* instruction); | 282 int InstructionDecode(v8::internal::Vector<char> buffer, byte* instruction); |
281 | 283 |
282 private: | 284 private: |
283 const NameConverter& converter_; | 285 const NameConverter& converter_; |
| 286 InstructionTable* instruction_table_; |
284 v8::internal::EmbeddedVector<char, 128> tmp_buffer_; | 287 v8::internal::EmbeddedVector<char, 128> tmp_buffer_; |
285 unsigned int tmp_buffer_pos_; | 288 unsigned int tmp_buffer_pos_; |
286 bool abort_on_unimplemented_; | 289 bool abort_on_unimplemented_; |
287 | 290 |
288 | |
289 enum { | 291 enum { |
290 eax = 0, | 292 eax = 0, |
291 ecx = 1, | 293 ecx = 1, |
292 edx = 2, | 294 edx = 2, |
293 ebx = 3, | 295 ebx = 3, |
294 esp = 4, | 296 esp = 4, |
295 ebp = 5, | 297 ebp = 5, |
296 esi = 6, | 298 esi = 6, |
297 edi = 7 | 299 edi = 7 |
298 }; | 300 }; |
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877 // We use these two prefixes only with branch prediction | 879 // We use these two prefixes only with branch prediction |
878 if (*data == 0x3E /*ds*/) { | 880 if (*data == 0x3E /*ds*/) { |
879 branch_hint = "predicted taken"; | 881 branch_hint = "predicted taken"; |
880 data++; | 882 data++; |
881 } else if (*data == 0x2E /*cs*/) { | 883 } else if (*data == 0x2E /*cs*/) { |
882 branch_hint = "predicted not taken"; | 884 branch_hint = "predicted not taken"; |
883 data++; | 885 data++; |
884 } | 886 } |
885 bool processed = true; // Will be set to false if the current instruction | 887 bool processed = true; // Will be set to false if the current instruction |
886 // is not in 'instructions' table. | 888 // is not in 'instructions' table. |
887 const InstructionDesc& idesc = instruction_table.Get(*data); | 889 const InstructionDesc& idesc = instruction_table_->Get(*data); |
888 switch (idesc.type) { | 890 switch (idesc.type) { |
889 case ZERO_OPERANDS_INSTR: | 891 case ZERO_OPERANDS_INSTR: |
890 AppendToBuffer(idesc.mnem); | 892 AppendToBuffer(idesc.mnem); |
891 data++; | 893 data++; |
892 break; | 894 break; |
893 | 895 |
894 case TWO_OPERANDS_INSTR: | 896 case TWO_OPERANDS_INSTR: |
895 data++; | 897 data++; |
896 data += PrintOperands(idesc.mnem, idesc.op_order_, data); | 898 data += PrintOperands(idesc.mnem, idesc.op_order_, data); |
897 break; | 899 break; |
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1647 fprintf(f, " "); | 1649 fprintf(f, " "); |
1648 } | 1650 } |
1649 fprintf(f, " %s\n", buffer.start()); | 1651 fprintf(f, " %s\n", buffer.start()); |
1650 } | 1652 } |
1651 } | 1653 } |
1652 | 1654 |
1653 | 1655 |
1654 } // namespace disasm | 1656 } // namespace disasm |
1655 | 1657 |
1656 #endif // V8_TARGET_ARCH_IA32 | 1658 #endif // V8_TARGET_ARCH_IA32 |
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