Fix CountLeadingZeros on non-ARMv5 hardware.

src/arm/macro-assembler-arm.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 3133 matching lines @@
                                        Register source,  // Input.
                                        Register scratch) {
   ASSERT(!zeros.is(source) || !source.is(scratch));
   ASSERT(!zeros.is(scratch));
   ASSERT(!scratch.is(ip));
   ASSERT(!source.is(ip));
   ASSERT(!zeros.is(ip));
 #ifdef CAN_USE_ARMV5_INSTRUCTIONS
   clz(zeros, source);  // This instruction is only supported after ARM5.
 #else
+  // Order of the next two lines is important: zeros register
+  // can be the same as source register.
+  Move(scratch, source);
   mov(zeros, Operand(0, RelocInfo::NONE));
-  Move(scratch, source);
   // Top 16.
   tst(scratch, Operand(0xffff0000));
   add(zeros, zeros, Operand(16), LeaveCC, eq);
   mov(scratch, Operand(scratch, LSL, 16), LeaveCC, eq);
   // Top 8.
   tst(scratch, Operand(0xff000000));
   add(zeros, zeros, Operand(8), LeaveCC, eq);
   mov(scratch, Operand(scratch, LSL, 8), LeaveCC, eq);
   // Top 4.
   tst(scratch, Operand(0xf0000000));
@@ skipping 489 matching lines @@
 void CodePatcher::EmitCondition(Condition cond) {
   Instr instr = Assembler::instr_at(masm_.pc_);
   instr = (instr & ~kCondMask) | cond;
   masm_.emit(instr);
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM