Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(459)

Issue 8342032: Bugfix for r9690. (Closed)

Created:
9 years, 2 months ago by Yang
Modified:
9 years, 2 months ago
Reviewers:
Sven Panne
CC:
v8-dev
Visibility:
Public.

Description

Bugfix for r9690. BUG=arm debug test of mjsunit/elements-transition segfaults Committed: http://code.google.com/p/v8/source/detail?r=9696

Patch Set 1 #

Patch Set 2 : . #

Total comments: 1

Patch Set 3 : Changed temp register to r2. #

Total comments: 1
Unified diffs Side-by-side diffs Delta from patch set Stats (+9 lines, -8 lines) Patch
M src/arm/code-stubs-arm.cc View 1 2 4 chunks +9 lines, -8 lines 1 comment Download

Messages

Total messages: 3 (0 generated)
Yang
Bugfix for r9690. Please take a look. http://codereview.chromium.org/8342032/diff/2001/src/arm/code-stubs-arm.cc File src/arm/code-stubs-arm.cc (left): http://codereview.chromium.org/8342032/diff/2001/src/arm/code-stubs-arm.cc#oldcode7374 src/arm/code-stubs-arm.cc:7374: r3, second ...
9 years, 2 months ago (2011-10-19 10:00:05 UTC) #1
Yang
Take another look please. I changed the temp register from lr to r2 which is ...
9 years, 2 months ago (2011-10-19 10:10:48 UTC) #2
Sven Panne
9 years, 2 months ago (2011-10-19 10:43:34 UTC) #3
LGTM with a nit, which should probably be addressed in a separate CL

http://codereview.chromium.org/8342032/diff/3/src/arm/code-stubs-arm.cc
File src/arm/code-stubs-arm.cc (right):

http://codereview.chromium.org/8342032/diff/3/src/arm/code-stubs-arm.cc#newco...
src/arm/code-stubs-arm.cc:7391: __ Pop(r2, r3);
Not introduced by this CL, but anyway: Our ARM macro-assembler should really
have symmetrical push/pop instructions. Currently, we are able to push e.g. 4
registers in a single instruction, but pop only 2. Note that we have to be
careful with the argument order to get good code.

Powered by Google App Engine
This is Rietveld 408576698