Make validator require read sandboxing on ARM.

src/trusted/validator_arm/inst_classes.h

Index: src/trusted/validator_arm/inst_classes.h
===================================================================
--- src/trusted/validator_arm/inst_classes.h	(revision 6916)
+++ src/trusted/validator_arm/inst_classes.h	(working copy)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011 The Native Client Authors.  All rights reserved.
+ * Copyright (c) 2011 The Native Client Authors. All rights reserved.
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
@@ -119,11 +119,10 @@
   }
 
   /*
-   * For instructions that can write memory, gets the register used as the base
-   * for generating the effective address.
+   * For instructions that can read or write memory, gets the register used as
+   * the base for generating the effective address.
    *
-   * The result is useful only for safe instructions where writes_memory() is
-   * true.  It is stubbed to return nonsense.
+   * It is stubbed to return nonsense.
    */
   virtual Register base_address_register(Instruction i) const {
     UNREFERENCED_PARAMETER(i);
@@ -131,6 +130,17 @@
   }
 
   /*
+   * Checks whether the instruction computes its read or write address as
+   * base address + immediate.
+   *
+   * It is stubbed to return false.
+   */
+  virtual bool offset_is_immediate(Instruction i) const {
+    UNREFERENCED_PARAMETER(i);
+    return false;
+  }
+
+  /*
    * For indirect branch instructions, returns the register being moved into
    * r15.  Otherwise, reports kRegisterNone.
    *
@@ -559,7 +569,9 @@
  public:
   virtual ~LoadRegister() {}
 
+  virtual SafetyLevel safety(Instruction i) const;
   virtual RegisterList defs(Instruction i) const;
+  virtual Register base_address_register(Instruction i) const;
 };
 
 /*
@@ -574,6 +586,8 @@
   virtual ~LoadImmediate() {}
 
   virtual RegisterList immediate_addressing_defs(Instruction i) const;
+  virtual Register base_address_register(Instruction i) const;
+  virtual bool offset_is_immediate(Instruction i) const;
 };
 
 /*
@@ -584,6 +598,8 @@
   virtual ~LoadDoubleI() {}
 
   virtual RegisterList defs(Instruction i) const;
+  virtual Register base_address_register(Instruction i) const;
+  virtual bool offset_is_immediate(Instruction i) const;
 };
 
 /*
@@ -593,7 +609,9 @@
  public:
   virtual ~LoadDoubleR() {}
 
+  virtual SafetyLevel safety(Instruction i) const;
   virtual RegisterList defs(Instruction i) const;
+  virtual Register base_address_register(Instruction i) const;
 };
 
 /*
@@ -612,6 +630,7 @@
   virtual ~LoadDoubleExclusive() {}
 
   virtual RegisterList defs(Instruction i) const;
+  virtual Register base_address_register(Instruction i) const;
 };
 
 /*
@@ -625,6 +644,7 @@
   virtual SafetyLevel safety(Instruction i) const;
   virtual RegisterList defs(Instruction i) const;
   virtual RegisterList immediate_addressing_defs(Instruction i) const;
+  virtual Register base_address_register(Instruction i) const;
 };
 
 /*
@@ -638,6 +658,7 @@
   virtual SafetyLevel safety(Instruction i) const;
   virtual RegisterList defs(Instruction i) const;
   virtual RegisterList immediate_addressing_defs(Instruction i) const;
+  virtual Register base_address_register(Instruction i) const;
 };
 
 /*