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Side by Side Diff: src/trusted/validator_arm/testdata/test_stores.S

Issue 8275008: Make validator require read sandboxing on ARM. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: '' Created 9 years, 2 months ago
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1 @ Copyright 2009 The Native Client Authors. All rights reserved. 1 @ Copyright 2009 The Native Client Authors. All rights reserved.
2 @ Use of this source code is governed by a BSD-style license that can 2 @ Use of this source code is governed by a BSD-style license that can
3 @ be found in the LICENSE file. 3 @ be found in the LICENSE file.
4 @ Copyright 2009 Google Inc. 4 @ Copyright 2009 Google Inc.
5 5
6 @ 6 @
7 @ Tests both legal and illegal variations on stores -- both stores that 7 @ Tests both legal and illegal variations on stores -- both stores that
8 @ require masking, and stores that are guaranteed sandboxed (i.e. through SP) 8 @ require masking, and stores that are guaranteed sandboxed (i.e. through SP)
9 @ 9 @
10 10
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
48 48
49 nop 49 nop
50 nop 50 nop
51 51
52 bundle5: 52 bundle5:
53 bic r0, r0, #0xC0000000 @ Mask a register, and 53 bic r0, r0, #0xC0000000 @ Mask a register, and
54 str r1, [r0], r2 @ use it in register post-index store: should pass. 54 str r1, [r0], r2 @ use it in register post-index store: should pass.
55 nop @ Don't mask, and 55 nop @ Don't mask, and
56 str r1, [r0], r2 @ use it in register post-index store: ERROR. 56 str r1, [r0], r2 @ use it in register post-index store: ERROR.
57 57
58 bundle6:
59 str r1, [sp], #1024 @ post-indexing sp by a constant is OK
60 str r1, [sp], r2 @ post-indexing sp by a register is an ERROR
61 bic r0, r0, #0xC0000000 @ Mask a register, and
62 str r1, [r0, r2] @ use it in register pre-index store: ERROR
63
58 conditional_sandbox: 64 conditional_sandbox:
59 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and 65 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and
60 streq r1, [r0] @ store: should work. 66 streq r1, [r0] @ store: should work.
61 67
62 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and 68 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and
63 str r1, [r0] @ store unconditionally: ERROR. 69 str r1, [r0] @ store unconditionally: ERROR.
64 70
65 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and 71 tst r0, #0xC0000000 @ Set Z if the top two bits are clear, and
66 strgt r1, [r0] @ store using wrong predicate: ERROR. 72 strgt r1, [r0] @ store using wrong predicate: ERROR.
67 73
68 tsteq r0, #0xC0000000 @ Conditionally set Z if the top two bits are clear, 74 tsteq r0, #0xC0000000 @ Conditionally set Z if the top two bits are clear,
69 strgt r1, [r0] @ and store using wrong predicate: ERROR. 75 strgt r1, [r0] @ and store using wrong predicate: ERROR.
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