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| 1 /* | 1 /* |
| 2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. | 2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. |
| 3 * Use of this source code is governed by a BSD-style license that can be | 3 * Use of this source code is governed by a BSD-style license that can be |
| 4 * found in the LICENSE file. | 4 * found in the LICENSE file. |
| 5 */ | 5 */ |
| 6 | 6 |
| 7 /* | 7 /* |
| 8 * NaCl Service Runtime, C-level context switch code. | 8 * NaCl Service Runtime, C-level context switch code. |
| 9 */ | 9 */ |
| 10 | 10 |
| (...skipping 26 matching lines...) Expand all Loading... | |
| 37 #if defined(NACL_TARGET_ARM_THUMB2_MODE) | 37 #if defined(NACL_TARGET_ARM_THUMB2_MODE) |
| 38 /* | 38 /* |
| 39 * An odd control flow transfer target address is how ARM processors switch | 39 * An odd control flow transfer target address is how ARM processors switch |
| 40 * to thumb mode. If either of the entry points (dynamic loader or user | 40 * to thumb mode. If either of the entry points (dynamic loader or user |
| 41 * code) is to thumb mode targets, then we are in thumb mode. If we are in | 41 * code) is to thumb mode targets, then we are in thumb mode. If we are in |
| 42 * thumb mode, the springboard target address must also be a thumb-mode | 42 * thumb mode, the springboard target address must also be a thumb-mode |
| 43 * address. | 43 * address. |
| 44 */ | 44 */ |
| 45 CHECK((nap->user_entry_pt & 0x1) | (nap->initial_entry_pt & 0x1)); | 45 CHECK((nap->user_entry_pt & 0x1) | (nap->initial_entry_pt & 0x1)); |
| 46 /* The real springboard target addresses are aligned 0xe mod 16. */ | 46 /* The real springboard target addresses are aligned 0xe mod 16. */ |
| 47 /* Skipping a 2-byte halt brings us to 0 mod 16. */ | 47 CHECK((nap->springboard_addr & 0xf) == 0xe); |
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robertm
2011/10/18 21:19:55
this change was not mentioned in the description
sehr (please use chromium)
2011/10/18 22:44:11
Thanks. This was not intended for this CL.
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| 48 CHECK((nap->springboard_addr & 0xf) == 0x0); | |
| 49 return nap->springboard_addr | 0x1; | 48 return nap->springboard_addr | 0x1; |
| 50 #else | 49 #else |
| 51 return nap->springboard_addr; | 50 return nap->springboard_addr; |
| 52 #endif | 51 #endif |
| 53 } | 52 } |
| 54 | 53 |
| 55 NORETURN void NaClStartThreadInApp(struct NaClAppThread *natp, | 54 NORETURN void NaClStartThreadInApp(struct NaClAppThread *natp, |
| 56 uint32_t new_prog_ctr) { | 55 uint32_t new_prog_ctr) { |
| 57 struct NaClApp *nap; | 56 struct NaClApp *nap; |
| 58 struct NaClThreadContext *context; | 57 struct NaClThreadContext *context; |
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| 94 | 93 |
| 95 nap = natp->nap; | 94 nap = natp->nap; |
| 96 context = &natp->user; | 95 context = &natp->user; |
| 97 context->spring_addr = NaClSysToUser(nap, | 96 context->spring_addr = NaClSysToUser(nap, |
| 98 nap->mem_start + SpringboardAddr(nap)); | 97 nap->mem_start + SpringboardAddr(nap)); |
| 99 context->new_eip = new_prog_ctr; | 98 context->new_eip = new_prog_ctr; |
| 100 context->sysret = natp->sysret; | 99 context->sysret = natp->sysret; |
| 101 | 100 |
| 102 NaClSwitch(context); | 101 NaClSwitch(context); |
| 103 } | 102 } |
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