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| 1 //===-- MipsNaClHeaders.cpp - Print SFI headers to an Mips .s file -----------==
=// |
| 2 // |
| 3 // The LLVM Compiler Infrastructure |
| 4 // |
| 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. |
| 7 // |
| 8 //===----------------------------------------------------------------------===// |
| 9 // |
| 10 // This file contains the initial header string needed |
| 11 // for the Native Client target in Mips assembly. |
| 12 // |
| 13 //===----------------------------------------------------------------------===// |
| 14 |
| 15 #include "llvm/Support/raw_ostream.h" |
| 16 #include "MipsNaClRewritePass.h" |
| 17 #include <string> |
| 18 |
| 19 using namespace llvm; |
| 20 |
| 21 void EmitMipsSFIHeaders(raw_ostream &O) { |
| 22 O << " # ========================================\n"; |
| 23 O << "# Branch: " << FlagSfiBranch << "\n"; |
| 24 O << "# Stack: " << FlagSfiStack << "\n"; |
| 25 O << "# Store: " << FlagSfiStore << "\n"; |
| 26 O << "# Data: " << FlagSfiData << "\n"; |
| 27 |
| 28 O << " # ========================================\n"; |
| 29 // NOTE: this macro does bundle alignment as follows |
| 30 // if current bundle pos is X emit pX data items of value "val" |
| 31 // NOTE: that pos will be one of: 0,4,8,12 |
| 32 // |
| 33 O << |
| 34 "\t.macro sfi_long_based_on_pos p0 p1 p2 p3 val\n" |
| 35 "\t.set pos, (. - XmagicX) % 16\n" |
| 36 "\t.fill (((\\p3<<12)|(\\p2<<8)|(\\p1<<4)|\\p0)>>pos) & 15, 4, \\val\n" |
| 37 "\t.endm\n" |
| 38 "\n\n"; |
| 39 |
| 40 O << |
| 41 "\t.macro sfi_nop_if_at_bundle_end\n" |
| 42 "\tsfi_long_based_on_pos 0 0 0 1 0x00000000\n" |
| 43 "\t.endm\n" |
| 44 "\n\n"; |
| 45 |
| 46 O << |
| 47 "\t.macro sfi_nops_to_force_slot3\n" |
| 48 "\tsfi_long_based_on_pos 3 2 1 0 0x00000000\n" |
| 49 "\t.endm\n" |
| 50 "\n\n"; |
| 51 |
| 52 O << |
| 53 "\t.macro sfi_nops_to_force_slot2\n" |
| 54 "\tsfi_long_based_on_pos 2 1 0 3 0x00000000\n" |
| 55 "\t.endm\n" |
| 56 "\n\n"; |
| 57 |
| 58 O << |
| 59 "\t.macro sfi_nops_to_force_slot1\n" |
| 60 "\tsfi_long_based_on_pos 1 0 3 2 0x00000000\n" |
| 61 "\t.endm\n" |
| 62 "\n\n"; |
| 63 |
| 64 O << " # ========================================\n"; |
| 65 if (FlagSfiZeroMask) { |
| 66 // This mode sets all mask to zero which makes them into nops |
| 67 // this is useful for linking this code against non-sandboxed code |
| 68 // for debugging purposes |
| 69 O << |
| 70 "\t.macro sfi_data_mask reg1 reg2 maskreg\n" |
| 71 "\tand \\reg1, \\reg1, \\reg1\n" |
| 72 "\t.endm\n" |
| 73 "\n\n"; |
| 74 |
| 75 O << |
| 76 "\t.macro sfi_code_mask reg1 reg2 maskreg\n" |
| 77 "\tand \\reg1, \\reg1, \\reg1\n" |
| 78 "\t.endm\n" |
| 79 "\n\n"; |
| 80 |
| 81 } else { |
| 82 O << |
| 83 "\t.macro sfi_data_mask reg1 reg2 maskreg\n" |
| 84 "\tand \\reg1, \\reg2, \\maskreg\n" |
| 85 "\t.endm\n" |
| 86 "\n\n"; |
| 87 |
| 88 O << |
| 89 "\t.macro sfi_code_mask reg1 reg2 maskreg\n" |
| 90 "\tand \\reg1, \\reg2, \\maskreg\n" |
| 91 "\t.endm\n" |
| 92 "\n\n"; |
| 93 } |
| 94 |
| 95 O << " # ========================================\n"; |
| 96 if (FlagSfiBranch) { |
| 97 O << |
| 98 "\t.macro sfi_call_preamble\n" |
| 99 "\tsfi_nops_to_force_slot2\n" |
| 100 "\t.endm\n" |
| 101 "\n\n"; |
| 102 |
| 103 O << |
| 104 "\t.macro sfi_return_preamble reg1 reg2 maskreg\n" |
| 105 "\tsfi_nop_if_at_bundle_end\n" |
| 106 "\tsfi_code_mask \\reg1, \\reg2, \\maskreg\n" |
| 107 "\t.endm\n" |
| 108 "\n\n"; |
| 109 |
| 110 // This is used just before "jr" |
| 111 O << |
| 112 "\t.macro sfi_indirect_jump_preamble reg1 reg2 maskreg\n" |
| 113 "\tsfi_nop_if_at_bundle_end\n" |
| 114 "\tsfi_code_mask \\reg1, \\reg2, \\maskreg\n" |
| 115 "\t.endm\n" |
| 116 "\n\n"; |
| 117 |
| 118 // This is used just before "jalr" |
| 119 O << |
| 120 "\t.macro sfi_indirect_call_preamble reg1 reg2 maskreg\n" |
| 121 "\tsfi_nops_to_force_slot1\n" |
| 122 "\tsfi_code_mask \\reg1, \\reg2, \\maskreg\n" |
| 123 "\t.endm\n" |
| 124 "\n\n"; |
| 125 |
| 126 } |
| 127 |
| 128 if (FlagSfiStore) { |
| 129 O << " # ========================================\n"; |
| 130 |
| 131 O << |
| 132 "\t.macro sfi_load_store_preamble reg1 reg2 maskreg\n" |
| 133 "\tsfi_nop_if_at_bundle_end\n" |
| 134 "\tsfi_data_mask \\reg1, \\reg2 , \\maskreg\n" |
| 135 "\t.endm\n" |
| 136 "\n\n"; |
| 137 } else { |
| 138 O << |
| 139 "\t.macro sfi_load_store_preamble reg1 reg2 maskreg\n" |
| 140 "\t.endm\n" |
| 141 "\n\n"; |
| 142 } |
| 143 |
| 144 O << " # ========================================\n"; |
| 145 O << "\t.text\n"; |
| 146 } |
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Chromium Code Reviews
Issue 8273005:
[MIPS] Initial support for MIPS architecture. (Closed)
