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| 1 //===- MipsInstrInfo.td - Target Description for Mips Target -*- tablegen -*-=// | 1 //===- MipsInstrInfo.td - Target Description for Mips Target -*- tablegen -*-=// |
| 2 // | 2 // |
| 3 // The LLVM Compiler Infrastructure | 3 // The LLVM Compiler Infrastructure |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file contains the Mips implementation of the TargetInstrInfo class. | 10 // This file contains the Mips implementation of the TargetInstrInfo class. |
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| 533 (ins CPURegs:$ptr, CPURegs:$cmp, CPURegs:$swap), | 533 (ins CPURegs:$ptr, CPURegs:$cmp, CPURegs:$swap), |
| 534 !strconcat("atomic_cmp_swap_", Width, | 534 !strconcat("atomic_cmp_swap_", Width, |
| 535 "\t$dst, $ptr, $cmp, $swap"), | 535 "\t$dst, $ptr, $cmp, $swap"), |
| 536 [(set CPURegs:$dst, | 536 [(set CPURegs:$dst, |
| 537 (Op CPURegs:$ptr, CPURegs:$cmp, CPURegs:$swap))]>; | 537 (Op CPURegs:$ptr, CPURegs:$cmp, CPURegs:$swap))]>; |
| 538 | 538 |
| 539 //===----------------------------------------------------------------------===// | 539 //===----------------------------------------------------------------------===// |
| 540 // Pseudo instructions | 540 // Pseudo instructions |
| 541 //===----------------------------------------------------------------------===// | 541 //===----------------------------------------------------------------------===// |
| 542 | 542 |
| 543 // @LOCALMOD-START |
| 544 |
| 545 // Older Macro based SFI Model |
| 546 def SFI_GUARD_LOAD_STORE : |
| 547 MipsPseudo<(outs CPURegs:$dst), (ins CPURegs:$src1, CPURegs:$src2), |
| 548 "sfi_load_store_preamble\t$dst, $src1, $src2", []>; |
| 549 |
| 550 def SFI_GUARD_INDIRECT_CALL : |
| 551 MipsPseudo<(outs CPURegs:$dst), (ins CPURegs:$src1, CPURegs:$src2), |
| 552 "sfi_indirect_call_preamble\t$dst, $src1, $src2", []>; |
| 553 |
| 554 def SFI_GUARD_INDIRECT_JMP : |
| 555 MipsPseudo<(outs CPURegs:$dst), (ins CPURegs:$src1, CPURegs:$src2), |
| 556 "sfi_indirect_jump_preamble\t$dst, $src1, $src2", []>; |
| 557 |
| 558 def SFI_GUARD_CALL : |
| 559 MipsPseudo<(outs), (ins), "sfi_call_preamble", []>; |
| 560 |
| 561 def SFI_GUARD_RETURN : |
| 562 MipsPseudo<(outs CPURegs:$dst), (ins CPURegs:$src1, CPURegs:$src2), |
| 563 "sfi_return_preamble\t$dst, $src1, $src2", []>; |
| 564 |
| 565 def SFI_NOP_IF_AT_BUNDLE_END : |
| 566 MipsPseudo<(outs), (ins), "sfi_nop_if_at_bundle_end", []>; |
| 567 |
| 568 def SFI_DATA_MASK : |
| 569 MipsPseudo<(outs CPURegs:$dst), (ins CPURegs:$src1, CPURegs:$src2), |
| 570 "sfi_data_mask\t$dst, $src1, $src2", []>; |
| 571 |
| 572 // @LOCALMOD-END |
| 573 |
| 543 // As stack alignment is always done with addiu, we need a 16-bit immediate | 574 // As stack alignment is always done with addiu, we need a 16-bit immediate |
| 544 let Defs = [SP], Uses = [SP] in { | 575 let Defs = [SP], Uses = [SP] in { |
| 545 def ADJCALLSTACKDOWN : MipsPseudo<(outs), (ins uimm16:$amt), | 576 def ADJCALLSTACKDOWN : MipsPseudo<(outs), (ins uimm16:$amt), |
| 546 "!ADJCALLSTACKDOWN $amt", | 577 "!ADJCALLSTACKDOWN $amt", |
| 547 [(callseq_start timm:$amt)]>; | 578 [(callseq_start timm:$amt)]>; |
| 548 def ADJCALLSTACKUP : MipsPseudo<(outs), (ins uimm16:$amt1, uimm16:$amt2), | 579 def ADJCALLSTACKUP : MipsPseudo<(outs), (ins uimm16:$amt1, uimm16:$amt2), |
| 549 "!ADJCALLSTACKUP $amt1", | 580 "!ADJCALLSTACKUP $amt1", |
| 550 [(callseq_end timm:$amt1, timm:$amt2)]>; | 581 [(callseq_end timm:$amt1, timm:$amt2)]>; |
| 551 } | 582 } |
| 552 | 583 |
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| 974 // select MipsDynAlloc | 1005 // select MipsDynAlloc |
| 975 def : Pat<(MipsDynAlloc addr:$f), (DynAlloc addr:$f)>; | 1006 def : Pat<(MipsDynAlloc addr:$f), (DynAlloc addr:$f)>; |
| 976 | 1007 |
| 977 //===----------------------------------------------------------------------===// | 1008 //===----------------------------------------------------------------------===// |
| 978 // Floating Point Support | 1009 // Floating Point Support |
| 979 //===----------------------------------------------------------------------===// | 1010 //===----------------------------------------------------------------------===// |
| 980 | 1011 |
| 981 include "MipsInstrFPU.td" | 1012 include "MipsInstrFPU.td" |
| 982 include "Mips64InstrInfo.td" | 1013 include "Mips64InstrInfo.td" |
| 983 | 1014 |
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