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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 456 } | 456 } |
| 457 | 457 |
| 458 | 458 |
| 459 void Assembler::push(const Operand& src) { | 459 void Assembler::push(const Operand& src) { |
| 460 EnsureSpace ensure_space(this); | 460 EnsureSpace ensure_space(this); |
| 461 EMIT(0xFF); | 461 EMIT(0xFF); |
| 462 emit_operand(esi, src); | 462 emit_operand(esi, src); |
| 463 } | 463 } |
| 464 | 464 |
| 465 | 465 |
| 466 void Assembler::push(Handle<Object> handle) { | |
| 467 EnsureSpace ensure_space(this); | |
| 468 EMIT(0x68); | |
| 469 emit(handle); | |
| 470 } | |
| 471 | |
| 472 | |
| 473 void Assembler::pop(Register dst) { | 466 void Assembler::pop(Register dst) { |
| 474 ASSERT(reloc_info_writer.last_pc() != NULL); | 467 ASSERT(reloc_info_writer.last_pc() != NULL); |
| 475 EnsureSpace ensure_space(this); | 468 EnsureSpace ensure_space(this); |
| 476 EMIT(0x58 | dst.code()); | 469 EMIT(0x58 | dst.code()); |
| 477 } | 470 } |
| 478 | 471 |
| 479 | 472 |
| 480 void Assembler::pop(const Operand& dst) { | 473 void Assembler::pop(const Operand& dst) { |
| 481 EnsureSpace ensure_space(this); | 474 EnsureSpace ensure_space(this); |
| 482 EMIT(0x8F); | 475 EMIT(0x8F); |
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| 621 | 614 |
| 622 | 615 |
| 623 void Assembler::movzx_w(Register dst, const Operand& src) { | 616 void Assembler::movzx_w(Register dst, const Operand& src) { |
| 624 EnsureSpace ensure_space(this); | 617 EnsureSpace ensure_space(this); |
| 625 EMIT(0x0F); | 618 EMIT(0x0F); |
| 626 EMIT(0xB7); | 619 EMIT(0xB7); |
| 627 emit_operand(dst, src); | 620 emit_operand(dst, src); |
| 628 } | 621 } |
| 629 | 622 |
| 630 | 623 |
| 631 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) { | |
| 632 ASSERT(CpuFeatures::IsEnabled(CMOV)); | |
| 633 EnsureSpace ensure_space(this); | |
| 634 UNIMPLEMENTED(); | |
| 635 USE(cc); | |
| 636 USE(dst); | |
| 637 USE(imm32); | |
| 638 } | |
| 639 | |
| 640 | |
| 641 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) { | |
| 642 ASSERT(CpuFeatures::IsEnabled(CMOV)); | |
| 643 EnsureSpace ensure_space(this); | |
| 644 UNIMPLEMENTED(); | |
| 645 USE(cc); | |
| 646 USE(dst); | |
| 647 USE(handle); | |
| 648 } | |
| 649 | |
| 650 | |
| 651 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { | 624 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { |
| 652 ASSERT(CpuFeatures::IsEnabled(CMOV)); | 625 ASSERT(CpuFeatures::IsEnabled(CMOV)); |
| 653 EnsureSpace ensure_space(this); | 626 EnsureSpace ensure_space(this); |
| 654 // Opcode: 0f 40 + cc /r. | 627 // Opcode: 0f 40 + cc /r. |
| 655 EMIT(0x0F); | 628 EMIT(0x0F); |
| 656 EMIT(0x40 + cc); | 629 EMIT(0x40 + cc); |
| 657 emit_operand(dst, src); | 630 emit_operand(dst, src); |
| 658 } | 631 } |
| 659 | 632 |
| 660 | 633 |
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| 2506 fprintf(coverage_log, "%s\n", file_line); | 2479 fprintf(coverage_log, "%s\n", file_line); |
| 2507 fflush(coverage_log); | 2480 fflush(coverage_log); |
| 2508 } | 2481 } |
| 2509 } | 2482 } |
| 2510 | 2483 |
| 2511 #endif | 2484 #endif |
| 2512 | 2485 |
| 2513 } } // namespace v8::internal | 2486 } } // namespace v8::internal |
| 2514 | 2487 |
| 2515 #endif // V8_TARGET_ARCH_IA32 | 2488 #endif // V8_TARGET_ARCH_IA32 |
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