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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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295 times_8 = 3, | 295 times_8 = 3, |
296 times_int_size = times_4, | 296 times_int_size = times_4, |
297 times_half_pointer_size = times_2, | 297 times_half_pointer_size = times_2, |
298 times_pointer_size = times_4, | 298 times_pointer_size = times_4, |
299 times_twice_pointer_size = times_8 | 299 times_twice_pointer_size = times_8 |
300 }; | 300 }; |
301 | 301 |
302 | 302 |
303 class Operand BASE_EMBEDDED { | 303 class Operand BASE_EMBEDDED { |
304 public: | 304 public: |
305 // reg | |
306 INLINE(explicit Operand(Register reg)); | |
307 | |
308 // XMM reg | 305 // XMM reg |
309 INLINE(explicit Operand(XMMRegister xmm_reg)); | 306 INLINE(explicit Operand(XMMRegister xmm_reg)); |
310 | 307 |
311 // [disp/r] | 308 // [disp/r] |
312 INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode)); | 309 INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode)); |
313 // disp only must always be relocated | 310 // disp only must always be relocated |
314 | 311 |
315 // [base + disp/r] | 312 // [base + disp/r] |
316 explicit Operand(Register base, int32_t disp, | 313 explicit Operand(Register base, int32_t disp, |
317 RelocInfo::Mode rmode = RelocInfo::NONE); | 314 RelocInfo::Mode rmode = RelocInfo::NONE); |
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343 | 340 |
344 static Operand Cell(Handle<JSGlobalPropertyCell> cell) { | 341 static Operand Cell(Handle<JSGlobalPropertyCell> cell) { |
345 return Operand(reinterpret_cast<int32_t>(cell.location()), | 342 return Operand(reinterpret_cast<int32_t>(cell.location()), |
346 RelocInfo::GLOBAL_PROPERTY_CELL); | 343 RelocInfo::GLOBAL_PROPERTY_CELL); |
347 } | 344 } |
348 | 345 |
349 // Returns true if this Operand is a wrapper for the specified register. | 346 // Returns true if this Operand is a wrapper for the specified register. |
350 bool is_reg(Register reg) const; | 347 bool is_reg(Register reg) const; |
351 | 348 |
352 // Returns true if this Operand is a wrapper for one register. | 349 // Returns true if this Operand is a wrapper for one register. |
353 bool is_reg_only() const; | 350 bool is_reg_only() const; |
Yang
2011/09/30 13:42:20
Is this still necessary if Operand wrapper has bee
Kevin Millikin (Chromium)
2011/09/30 14:23:54
For now it is. Under the hood it's the same imple
| |
354 | 351 |
355 // Asserts that this Operand is a wrapper for one register and returns the | 352 // Asserts that this Operand is a wrapper for one register and returns the |
356 // register. | 353 // register. |
357 Register reg() const; | 354 Register reg() const; |
358 | 355 |
359 private: | 356 private: |
360 byte buf_[6]; | 357 // reg |
361 // The number of bytes in buf_. | 358 INLINE(explicit Operand(Register reg)); |
362 unsigned int len_; | |
363 // Only valid if len_ > 4. | |
364 RelocInfo::Mode rmode_; | |
365 | 359 |
366 // Set the ModRM byte without an encoded 'reg' register. The | 360 // Set the ModRM byte without an encoded 'reg' register. The |
367 // register is encoded later as part of the emit_operand operation. | 361 // register is encoded later as part of the emit_operand operation. |
368 inline void set_modrm(int mod, Register rm); | 362 inline void set_modrm(int mod, Register rm); |
369 | 363 |
370 inline void set_sib(ScaleFactor scale, Register index, Register base); | 364 inline void set_sib(ScaleFactor scale, Register index, Register base); |
371 inline void set_disp8(int8_t disp); | 365 inline void set_disp8(int8_t disp); |
372 inline void set_dispr(int32_t disp, RelocInfo::Mode rmode); | 366 inline void set_dispr(int32_t disp, RelocInfo::Mode rmode); |
373 | 367 |
368 byte buf_[6]; | |
369 // The number of bytes in buf_. | |
370 unsigned int len_; | |
371 // Only valid if len_ > 4. | |
372 RelocInfo::Mode rmode_; | |
373 | |
374 friend class Assembler; | 374 friend class Assembler; |
375 friend class MacroAssembler; | |
376 friend class LCodeGen; | |
375 }; | 377 }; |
376 | 378 |
377 | 379 |
378 // ----------------------------------------------------------------------------- | 380 // ----------------------------------------------------------------------------- |
379 // A Displacement describes the 32bit immediate field of an instruction which | 381 // A Displacement describes the 32bit immediate field of an instruction which |
380 // may be used together with a Label in order to refer to a yet unknown code | 382 // may be used together with a Label in order to refer to a yet unknown code |
381 // position. Displacements stored in the instruction stream are used to describe | 383 // position. Displacements stored in the instruction stream are used to describe |
382 // the instruction and to chain a list of instructions using the same Label. | 384 // the instruction and to chain a list of instructions using the same Label. |
383 // A Displacement contains 2 different fields: | 385 // A Displacement contains 2 different fields: |
384 // | 386 // |
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673 void push(const Operand& src); | 675 void push(const Operand& src); |
674 void push(Handle<Object> handle); | 676 void push(Handle<Object> handle); |
675 | 677 |
676 void pop(Register dst); | 678 void pop(Register dst); |
677 void pop(const Operand& dst); | 679 void pop(const Operand& dst); |
678 | 680 |
679 void enter(const Immediate& size); | 681 void enter(const Immediate& size); |
680 void leave(); | 682 void leave(); |
681 | 683 |
682 // Moves | 684 // Moves |
685 void mov_b(Register dst, Register src) { mov_b(dst, Operand(src)); } | |
683 void mov_b(Register dst, const Operand& src); | 686 void mov_b(Register dst, const Operand& src); |
687 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } | |
684 void mov_b(const Operand& dst, int8_t imm8); | 688 void mov_b(const Operand& dst, int8_t imm8); |
685 void mov_b(const Operand& dst, Register src); | 689 void mov_b(const Operand& dst, Register src); |
686 | 690 |
687 void mov_w(Register dst, const Operand& src); | 691 void mov_w(Register dst, const Operand& src); |
688 void mov_w(const Operand& dst, Register src); | 692 void mov_w(const Operand& dst, Register src); |
689 | 693 |
690 void mov(Register dst, int32_t imm32); | 694 void mov(Register dst, int32_t imm32); |
691 void mov(Register dst, const Immediate& x); | 695 void mov(Register dst, const Immediate& x); |
692 void mov(Register dst, Handle<Object> handle); | 696 void mov(Register dst, Handle<Object> handle); |
693 void mov(Register dst, const Operand& src); | 697 void mov(Register dst, const Operand& src); |
694 void mov(Register dst, Register src); | 698 void mov(Register dst, Register src); |
695 void mov(const Operand& dst, const Immediate& x); | 699 void mov(const Operand& dst, const Immediate& x); |
696 void mov(const Operand& dst, Handle<Object> handle); | 700 void mov(const Operand& dst, Handle<Object> handle); |
697 void mov(const Operand& dst, Register src); | 701 void mov(const Operand& dst, Register src); |
698 | 702 |
703 void movsx_b(Register dst, Register src) { movsx_b(dst, Operand(src)); } | |
699 void movsx_b(Register dst, const Operand& src); | 704 void movsx_b(Register dst, const Operand& src); |
700 | 705 |
706 void movsx_w(Register dst, Register src) { movsx_w(dst, Operand(src)); } | |
701 void movsx_w(Register dst, const Operand& src); | 707 void movsx_w(Register dst, const Operand& src); |
702 | 708 |
709 void movzx_b(Register dst, Register src) { movzx_b(dst, Operand(src)); } | |
703 void movzx_b(Register dst, const Operand& src); | 710 void movzx_b(Register dst, const Operand& src); |
704 | 711 |
712 void movzx_w(Register dst, Register src) { movzx_w(dst, Operand(src)); } | |
705 void movzx_w(Register dst, const Operand& src); | 713 void movzx_w(Register dst, const Operand& src); |
706 | 714 |
707 // Conditional moves | 715 // Conditional moves |
708 void cmov(Condition cc, Register dst, int32_t imm32); | 716 void cmov(Condition cc, Register dst, int32_t imm32); |
709 void cmov(Condition cc, Register dst, Handle<Object> handle); | 717 void cmov(Condition cc, Register dst, Handle<Object> handle); |
718 void cmov(Condition cc, Register dst, Register src) { | |
719 cmov(cc, dst, Operand(src)); | |
720 } | |
710 void cmov(Condition cc, Register dst, const Operand& src); | 721 void cmov(Condition cc, Register dst, const Operand& src); |
711 | 722 |
712 // Flag management. | 723 // Flag management. |
713 void cld(); | 724 void cld(); |
714 | 725 |
715 // Repetitive string instructions. | 726 // Repetitive string instructions. |
716 void rep_movs(); | 727 void rep_movs(); |
717 void rep_stos(); | 728 void rep_stos(); |
718 void stos(); | 729 void stos(); |
719 | 730 |
720 // Exchange two registers | 731 // Exchange two registers |
721 void xchg(Register dst, Register src); | 732 void xchg(Register dst, Register src); |
722 | 733 |
723 // Arithmetics | 734 // Arithmetics |
724 void adc(Register dst, int32_t imm32); | 735 void adc(Register dst, int32_t imm32); |
725 void adc(Register dst, const Operand& src); | 736 void adc(Register dst, const Operand& src); |
726 | 737 |
738 void add(Register dst, Register src) { add(dst, Operand(src)); } | |
727 void add(Register dst, const Operand& src); | 739 void add(Register dst, const Operand& src); |
728 void add(const Operand& dst, Register src); | 740 void add(const Operand& dst, Register src); |
741 void add(Register dst, const Immediate& imm) { add(Operand(dst), imm); } | |
729 void add(const Operand& dst, const Immediate& x); | 742 void add(const Operand& dst, const Immediate& x); |
730 | 743 |
731 void and_(Register dst, int32_t imm32); | 744 void and_(Register dst, int32_t imm32); |
732 void and_(Register dst, const Immediate& x); | 745 void and_(Register dst, const Immediate& x); |
746 void and_(Register dst, Register src) { and_(dst, Operand(src)); } | |
733 void and_(Register dst, const Operand& src); | 747 void and_(Register dst, const Operand& src); |
734 void and_(const Operand& src, Register dst); | 748 void and_(const Operand& dst, Register src); |
735 void and_(const Operand& dst, const Immediate& x); | 749 void and_(const Operand& dst, const Immediate& x); |
736 | 750 |
751 void cmpb(Register reg, int8_t imm8) { cmpb(Operand(reg), imm8); } | |
737 void cmpb(const Operand& op, int8_t imm8); | 752 void cmpb(const Operand& op, int8_t imm8); |
738 void cmpb(Register src, const Operand& dst); | 753 void cmpb(Register reg, const Operand& op); |
739 void cmpb(const Operand& dst, Register src); | 754 void cmpb(const Operand& op, Register reg); |
740 void cmpb_al(const Operand& op); | 755 void cmpb_al(const Operand& op); |
741 void cmpw_ax(const Operand& op); | 756 void cmpw_ax(const Operand& op); |
742 void cmpw(const Operand& op, Immediate imm16); | 757 void cmpw(const Operand& op, Immediate imm16); |
743 void cmp(Register reg, int32_t imm32); | 758 void cmp(Register reg, int32_t imm32); |
744 void cmp(Register reg, Handle<Object> handle); | 759 void cmp(Register reg, Handle<Object> handle); |
760 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); } | |
745 void cmp(Register reg, const Operand& op); | 761 void cmp(Register reg, const Operand& op); |
762 void cmp(Register reg, const Immediate& imm) { cmp(Operand(reg), imm); } | |
746 void cmp(const Operand& op, const Immediate& imm); | 763 void cmp(const Operand& op, const Immediate& imm); |
747 void cmp(const Operand& op, Handle<Object> handle); | 764 void cmp(const Operand& op, Handle<Object> handle); |
748 | 765 |
749 void dec_b(Register dst); | 766 void dec_b(Register dst); |
750 void dec_b(const Operand& dst); | 767 void dec_b(const Operand& dst); |
751 | 768 |
752 void dec(Register dst); | 769 void dec(Register dst); |
753 void dec(const Operand& dst); | 770 void dec(const Operand& dst); |
754 | 771 |
755 void cdq(); | 772 void cdq(); |
756 | 773 |
757 void idiv(Register src); | 774 void idiv(Register src); |
758 | 775 |
759 // Signed multiply instructions. | 776 // Signed multiply instructions. |
760 void imul(Register src); // edx:eax = eax * src. | 777 void imul(Register src); // edx:eax = eax * src. |
778 void imul(Register dst, Register src) { imul(dst, Operand(src)); } | |
761 void imul(Register dst, const Operand& src); // dst = dst * src. | 779 void imul(Register dst, const Operand& src); // dst = dst * src. |
762 void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32. | 780 void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32. |
763 | 781 |
764 void inc(Register dst); | 782 void inc(Register dst); |
765 void inc(const Operand& dst); | 783 void inc(const Operand& dst); |
766 | 784 |
767 void lea(Register dst, const Operand& src); | 785 void lea(Register dst, const Operand& src); |
768 | 786 |
769 // Unsigned multiply instruction. | 787 // Unsigned multiply instruction. |
770 void mul(Register src); // edx:eax = eax * reg. | 788 void mul(Register src); // edx:eax = eax * reg. |
771 | 789 |
772 void neg(Register dst); | 790 void neg(Register dst); |
773 | 791 |
774 void not_(Register dst); | 792 void not_(Register dst); |
775 | 793 |
776 void or_(Register dst, int32_t imm32); | 794 void or_(Register dst, int32_t imm32); |
795 void or_(Register dst, Register src) { or_(dst, Operand(src)); } | |
777 void or_(Register dst, const Operand& src); | 796 void or_(Register dst, const Operand& src); |
778 void or_(const Operand& dst, Register src); | 797 void or_(const Operand& dst, Register src); |
798 void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); } | |
779 void or_(const Operand& dst, const Immediate& x); | 799 void or_(const Operand& dst, const Immediate& x); |
780 | 800 |
781 void rcl(Register dst, uint8_t imm8); | 801 void rcl(Register dst, uint8_t imm8); |
782 void rcr(Register dst, uint8_t imm8); | 802 void rcr(Register dst, uint8_t imm8); |
783 | 803 |
784 void sar(Register dst, uint8_t imm8); | 804 void sar(Register dst, uint8_t imm8); |
785 void sar_cl(Register dst); | 805 void sar_cl(Register dst); |
786 | 806 |
787 void sbb(Register dst, const Operand& src); | 807 void sbb(Register dst, const Operand& src); |
788 | 808 |
809 void shld(Register dst, Register src) { shld(dst, Operand(src)); } | |
789 void shld(Register dst, const Operand& src); | 810 void shld(Register dst, const Operand& src); |
790 | 811 |
791 void shl(Register dst, uint8_t imm8); | 812 void shl(Register dst, uint8_t imm8); |
792 void shl_cl(Register dst); | 813 void shl_cl(Register dst); |
793 | 814 |
815 void shrd(Register dst, Register src) { shrd(dst, Operand(src)); } | |
794 void shrd(Register dst, const Operand& src); | 816 void shrd(Register dst, const Operand& src); |
795 | 817 |
796 void shr(Register dst, uint8_t imm8); | 818 void shr(Register dst, uint8_t imm8); |
797 void shr_cl(Register dst); | 819 void shr_cl(Register dst); |
798 | 820 |
821 void sub(Register dst, const Immediate& imm) { sub(Operand(dst), imm); } | |
799 void sub(const Operand& dst, const Immediate& x); | 822 void sub(const Operand& dst, const Immediate& x); |
823 void sub(Register dst, Register src) { sub(dst, Operand(src)); } | |
800 void sub(Register dst, const Operand& src); | 824 void sub(Register dst, const Operand& src); |
801 void sub(const Operand& dst, Register src); | 825 void sub(const Operand& dst, Register src); |
802 | 826 |
803 void test(Register reg, const Immediate& imm); | 827 void test(Register reg, const Immediate& imm); |
828 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); } | |
804 void test(Register reg, const Operand& op); | 829 void test(Register reg, const Operand& op); |
805 void test_b(Register reg, const Operand& op); | 830 void test_b(Register reg, const Operand& op); |
806 void test(const Operand& op, const Immediate& imm); | 831 void test(const Operand& op, const Immediate& imm); |
832 void test_b(Register reg, uint8_t imm8) { test_b(Operand(reg), imm8); } | |
807 void test_b(const Operand& op, uint8_t imm8); | 833 void test_b(const Operand& op, uint8_t imm8); |
808 | 834 |
809 void xor_(Register dst, int32_t imm32); | 835 void xor_(Register dst, int32_t imm32); |
836 void xor_(Register dst, Register src) { xor_(dst, Operand(src)); } | |
810 void xor_(Register dst, const Operand& src); | 837 void xor_(Register dst, const Operand& src); |
811 void xor_(const Operand& src, Register dst); | 838 void xor_(const Operand& dst, Register src); |
839 void xor_(Register dst, const Immediate& imm) { xor_(Operand(dst), imm); } | |
812 void xor_(const Operand& dst, const Immediate& x); | 840 void xor_(const Operand& dst, const Immediate& x); |
813 | 841 |
814 // Bit operations. | 842 // Bit operations. |
815 void bt(const Operand& dst, Register src); | 843 void bt(const Operand& dst, Register src); |
844 void bts(Register dst, Register src) { bts(Operand(dst), src); } | |
816 void bts(const Operand& dst, Register src); | 845 void bts(const Operand& dst, Register src); |
817 | 846 |
818 // Miscellaneous | 847 // Miscellaneous |
819 void hlt(); | 848 void hlt(); |
820 void int3(); | 849 void int3(); |
821 void nop(); | 850 void nop(); |
822 void rdtsc(); | 851 void rdtsc(); |
823 void ret(int imm16); | 852 void ret(int imm16); |
824 | 853 |
825 // Label operations & relative jumps (PPUM Appendix D) | 854 // Label operations & relative jumps (PPUM Appendix D) |
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836 // | 865 // |
837 // Note: The same Label can be used for forward and backward branches | 866 // Note: The same Label can be used for forward and backward branches |
838 // but it may be bound only once. | 867 // but it may be bound only once. |
839 | 868 |
840 void bind(Label* L); // binds an unbound label L to the current code position | 869 void bind(Label* L); // binds an unbound label L to the current code position |
841 | 870 |
842 // Calls | 871 // Calls |
843 void call(Label* L); | 872 void call(Label* L); |
844 void call(byte* entry, RelocInfo::Mode rmode); | 873 void call(byte* entry, RelocInfo::Mode rmode); |
845 int CallSize(const Operand& adr); | 874 int CallSize(const Operand& adr); |
875 void call(Register reg) { call(Operand(reg)); } | |
846 void call(const Operand& adr); | 876 void call(const Operand& adr); |
847 int CallSize(Handle<Code> code, RelocInfo::Mode mode); | 877 int CallSize(Handle<Code> code, RelocInfo::Mode mode); |
848 void call(Handle<Code> code, | 878 void call(Handle<Code> code, |
849 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET, | 879 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET, |
850 unsigned ast_id = kNoASTId); | 880 unsigned ast_id = kNoASTId); |
851 | 881 |
852 // Jumps | 882 // Jumps |
853 // unconditional jump to L | 883 // unconditional jump to L |
854 void jmp(Label* L, Label::Distance distance = Label::kFar); | 884 void jmp(Label* L, Label::Distance distance = Label::kFar); |
855 void jmp(byte* entry, RelocInfo::Mode rmode); | 885 void jmp(byte* entry, RelocInfo::Mode rmode); |
886 void jmp(Register reg) { jmp(Operand(reg)); } | |
856 void jmp(const Operand& adr); | 887 void jmp(const Operand& adr); |
857 void jmp(Handle<Code> code, RelocInfo::Mode rmode); | 888 void jmp(Handle<Code> code, RelocInfo::Mode rmode); |
858 | 889 |
859 // Conditional jumps | 890 // Conditional jumps |
860 void j(Condition cc, | 891 void j(Condition cc, |
861 Label* L, | 892 Label* L, |
862 Label::Distance distance = Label::kFar); | 893 Label::Distance distance = Label::kFar); |
863 void j(Condition cc, byte* entry, RelocInfo::Mode rmode); | 894 void j(Condition cc, byte* entry, RelocInfo::Mode rmode); |
864 void j(Condition cc, Handle<Code> code); | 895 void j(Condition cc, Handle<Code> code); |
865 | 896 |
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930 | 961 |
931 void sahf(); | 962 void sahf(); |
932 void setcc(Condition cc, Register reg); | 963 void setcc(Condition cc, Register reg); |
933 | 964 |
934 void cpuid(); | 965 void cpuid(); |
935 | 966 |
936 // SSE2 instructions | 967 // SSE2 instructions |
937 void cvttss2si(Register dst, const Operand& src); | 968 void cvttss2si(Register dst, const Operand& src); |
938 void cvttsd2si(Register dst, const Operand& src); | 969 void cvttsd2si(Register dst, const Operand& src); |
939 | 970 |
971 void cvtsi2sd(XMMRegister dst, Register src) { cvtsi2sd(dst, Operand(src)); } | |
940 void cvtsi2sd(XMMRegister dst, const Operand& src); | 972 void cvtsi2sd(XMMRegister dst, const Operand& src); |
941 void cvtss2sd(XMMRegister dst, XMMRegister src); | 973 void cvtss2sd(XMMRegister dst, XMMRegister src); |
942 void cvtsd2ss(XMMRegister dst, XMMRegister src); | 974 void cvtsd2ss(XMMRegister dst, XMMRegister src); |
943 | 975 |
944 void addsd(XMMRegister dst, XMMRegister src); | 976 void addsd(XMMRegister dst, XMMRegister src); |
945 void subsd(XMMRegister dst, XMMRegister src); | 977 void subsd(XMMRegister dst, XMMRegister src); |
946 void mulsd(XMMRegister dst, XMMRegister src); | 978 void mulsd(XMMRegister dst, XMMRegister src); |
947 void divsd(XMMRegister dst, XMMRegister src); | 979 void divsd(XMMRegister dst, XMMRegister src); |
948 void xorpd(XMMRegister dst, XMMRegister src); | 980 void xorpd(XMMRegister dst, XMMRegister src); |
949 void xorps(XMMRegister dst, XMMRegister src); | 981 void xorps(XMMRegister dst, XMMRegister src); |
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970 | 1002 |
971 void movdqa(XMMRegister dst, const Operand& src); | 1003 void movdqa(XMMRegister dst, const Operand& src); |
972 void movdqa(const Operand& dst, XMMRegister src); | 1004 void movdqa(const Operand& dst, XMMRegister src); |
973 void movdqu(XMMRegister dst, const Operand& src); | 1005 void movdqu(XMMRegister dst, const Operand& src); |
974 void movdqu(const Operand& dst, XMMRegister src); | 1006 void movdqu(const Operand& dst, XMMRegister src); |
975 | 1007 |
976 // Use either movsd or movlpd. | 1008 // Use either movsd or movlpd. |
977 void movdbl(XMMRegister dst, const Operand& src); | 1009 void movdbl(XMMRegister dst, const Operand& src); |
978 void movdbl(const Operand& dst, XMMRegister src); | 1010 void movdbl(const Operand& dst, XMMRegister src); |
979 | 1011 |
1012 void movd(XMMRegister dst, Register src) { movd(dst, Operand(src)); } | |
980 void movd(XMMRegister dst, const Operand& src); | 1013 void movd(XMMRegister dst, const Operand& src); |
981 void movd(const Operand& src, XMMRegister dst); | 1014 void movd(Register dst, XMMRegister src) { movd(Operand(dst), src); } |
1015 void movd(const Operand& dst, XMMRegister src); | |
982 void movsd(XMMRegister dst, XMMRegister src); | 1016 void movsd(XMMRegister dst, XMMRegister src); |
983 | 1017 |
984 void movss(XMMRegister dst, const Operand& src); | 1018 void movss(XMMRegister dst, const Operand& src); |
985 void movss(const Operand& src, XMMRegister dst); | 1019 void movss(const Operand& dst, XMMRegister src); |
986 void movss(XMMRegister dst, XMMRegister src); | 1020 void movss(XMMRegister dst, XMMRegister src); |
987 | 1021 |
988 void pand(XMMRegister dst, XMMRegister src); | 1022 void pand(XMMRegister dst, XMMRegister src); |
989 void pxor(XMMRegister dst, XMMRegister src); | 1023 void pxor(XMMRegister dst, XMMRegister src); |
990 void por(XMMRegister dst, XMMRegister src); | 1024 void por(XMMRegister dst, XMMRegister src); |
991 void ptest(XMMRegister dst, XMMRegister src); | 1025 void ptest(XMMRegister dst, XMMRegister src); |
992 | 1026 |
993 void psllq(XMMRegister reg, int8_t shift); | 1027 void psllq(XMMRegister reg, int8_t shift); |
994 void psllq(XMMRegister dst, XMMRegister src); | 1028 void psllq(XMMRegister dst, XMMRegister src); |
995 void psrlq(XMMRegister reg, int8_t shift); | 1029 void psrlq(XMMRegister reg, int8_t shift); |
996 void psrlq(XMMRegister dst, XMMRegister src); | 1030 void psrlq(XMMRegister dst, XMMRegister src); |
997 void pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle); | 1031 void pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle); |
1032 void pextrd(Register dst, XMMRegister src, int8_t offset) { | |
1033 pextrd(Operand(dst), src, offset); | |
1034 } | |
998 void pextrd(const Operand& dst, XMMRegister src, int8_t offset); | 1035 void pextrd(const Operand& dst, XMMRegister src, int8_t offset); |
1036 void pinsrd(XMMRegister dst, Register src, int8_t offset) { | |
1037 pinsrd(dst, Operand(src), offset); | |
1038 } | |
999 void pinsrd(XMMRegister dst, const Operand& src, int8_t offset); | 1039 void pinsrd(XMMRegister dst, const Operand& src, int8_t offset); |
1000 | 1040 |
1001 // Parallel XMM operations. | 1041 // Parallel XMM operations. |
1002 void movntdqa(XMMRegister src, const Operand& dst); | 1042 void movntdqa(XMMRegister dst, const Operand& src); |
1003 void movntdq(const Operand& dst, XMMRegister src); | 1043 void movntdq(const Operand& dst, XMMRegister src); |
1004 // Prefetch src position into cache level. | 1044 // Prefetch src position into cache level. |
1005 // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a | 1045 // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a |
1006 // non-temporal | 1046 // non-temporal |
1007 void prefetch(const Operand& src, int level); | 1047 void prefetch(const Operand& src, int level); |
1008 // TODO(lrn): Need SFENCE for movnt? | 1048 // TODO(lrn): Need SFENCE for movnt? |
1009 | 1049 |
1010 // Debugging | 1050 // Debugging |
1011 void Print(); | 1051 void Print(); |
1012 | 1052 |
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1161 private: | 1201 private: |
1162 Assembler* assembler_; | 1202 Assembler* assembler_; |
1163 #ifdef DEBUG | 1203 #ifdef DEBUG |
1164 int space_before_; | 1204 int space_before_; |
1165 #endif | 1205 #endif |
1166 }; | 1206 }; |
1167 | 1207 |
1168 } } // namespace v8::internal | 1208 } } // namespace v8::internal |
1169 | 1209 |
1170 #endif // V8_IA32_ASSEMBLER_IA32_H_ | 1210 #endif // V8_IA32_ASSEMBLER_IA32_H_ |
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