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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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81 } | 81 } |
82 | 82 |
83 Assembler assm(NULL, memory->address(), kBufferSize); | 83 Assembler assm(NULL, memory->address(), kBufferSize); |
84 Label cpuid, done; | 84 Label cpuid, done; |
85 #define __ assm. | 85 #define __ assm. |
86 // Save old esp, since we are going to modify the stack. | 86 // Save old esp, since we are going to modify the stack. |
87 __ push(ebp); | 87 __ push(ebp); |
88 __ pushfd(); | 88 __ pushfd(); |
89 __ push(ecx); | 89 __ push(ecx); |
90 __ push(ebx); | 90 __ push(ebx); |
91 __ mov(ebp, Operand(esp)); | 91 __ mov(ebp, esp); |
92 | 92 |
93 // If we can modify bit 21 of the EFLAGS register, then CPUID is supported. | 93 // If we can modify bit 21 of the EFLAGS register, then CPUID is supported. |
94 __ pushfd(); | 94 __ pushfd(); |
95 __ pop(eax); | 95 __ pop(eax); |
96 __ mov(edx, Operand(eax)); | 96 __ mov(edx, eax); |
97 __ xor_(eax, 0x200000); // Flip bit 21. | 97 __ xor_(eax, 0x200000); // Flip bit 21. |
98 __ push(eax); | 98 __ push(eax); |
99 __ popfd(); | 99 __ popfd(); |
100 __ pushfd(); | 100 __ pushfd(); |
101 __ pop(eax); | 101 __ pop(eax); |
102 __ xor_(eax, Operand(edx)); // Different if CPUID is supported. | 102 __ xor_(eax, edx); // Different if CPUID is supported. |
103 __ j(not_zero, &cpuid); | 103 __ j(not_zero, &cpuid); |
104 | 104 |
105 // CPUID not supported. Clear the supported features in edx:eax. | 105 // CPUID not supported. Clear the supported features in edx:eax. |
106 __ xor_(eax, Operand(eax)); | 106 __ xor_(eax, eax); |
107 __ xor_(edx, Operand(edx)); | 107 __ xor_(edx, edx); |
108 __ jmp(&done); | 108 __ jmp(&done); |
109 | 109 |
110 // Invoke CPUID with 1 in eax to get feature information in | 110 // Invoke CPUID with 1 in eax to get feature information in |
111 // ecx:edx. Temporarily enable CPUID support because we know it's | 111 // ecx:edx. Temporarily enable CPUID support because we know it's |
112 // safe here. | 112 // safe here. |
113 __ bind(&cpuid); | 113 __ bind(&cpuid); |
114 __ mov(eax, 1); | 114 __ mov(eax, 1); |
115 supported_ = (1 << CPUID); | 115 supported_ = (1 << CPUID); |
116 { Scope fscope(CPUID); | 116 { Scope fscope(CPUID); |
117 __ cpuid(); | 117 __ cpuid(); |
118 } | 118 } |
119 supported_ = 0; | 119 supported_ = 0; |
120 | 120 |
121 // Move the result from ecx:edx to edx:eax and make sure to mark the | 121 // Move the result from ecx:edx to edx:eax and make sure to mark the |
122 // CPUID feature as supported. | 122 // CPUID feature as supported. |
123 __ mov(eax, Operand(edx)); | 123 __ mov(eax, edx); |
124 __ or_(eax, 1 << CPUID); | 124 __ or_(eax, 1 << CPUID); |
125 __ mov(edx, Operand(ecx)); | 125 __ mov(edx, ecx); |
126 | 126 |
127 // Done. | 127 // Done. |
128 __ bind(&done); | 128 __ bind(&done); |
129 __ mov(esp, Operand(ebp)); | 129 __ mov(esp, ebp); |
130 __ pop(ebx); | 130 __ pop(ebx); |
131 __ pop(ecx); | 131 __ pop(ecx); |
132 __ popfd(); | 132 __ popfd(); |
133 __ pop(ebp); | 133 __ pop(ebp); |
134 __ ret(0); | 134 __ ret(0); |
135 #undef __ | 135 #undef __ |
136 | 136 |
137 typedef uint64_t (*F0)(); | 137 typedef uint64_t (*F0)(); |
138 F0 probe = FUNCTION_CAST<F0>(reinterpret_cast<Address>(memory->address())); | 138 F0 probe = FUNCTION_CAST<F0>(reinterpret_cast<Address>(memory->address())); |
139 supported_ = probe(); | 139 supported_ = probe(); |
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765 if (op.is_reg(eax)) { | 765 if (op.is_reg(eax)) { |
766 EMIT(0x3C); | 766 EMIT(0x3C); |
767 } else { | 767 } else { |
768 EMIT(0x80); | 768 EMIT(0x80); |
769 emit_operand(edi, op); // edi == 7 | 769 emit_operand(edi, op); // edi == 7 |
770 } | 770 } |
771 EMIT(imm8); | 771 EMIT(imm8); |
772 } | 772 } |
773 | 773 |
774 | 774 |
775 void Assembler::cmpb(const Operand& dst, Register src) { | 775 void Assembler::cmpb(const Operand& op, Register reg) { |
776 ASSERT(src.is_byte_register()); | 776 ASSERT(reg.is_byte_register()); |
777 EnsureSpace ensure_space(this); | 777 EnsureSpace ensure_space(this); |
778 EMIT(0x38); | 778 EMIT(0x38); |
779 emit_operand(src, dst); | 779 emit_operand(reg, op); |
780 } | 780 } |
781 | 781 |
782 | 782 |
783 void Assembler::cmpb(Register dst, const Operand& src) { | 783 void Assembler::cmpb(Register reg, const Operand& op) { |
784 ASSERT(dst.is_byte_register()); | 784 ASSERT(reg.is_byte_register()); |
785 EnsureSpace ensure_space(this); | 785 EnsureSpace ensure_space(this); |
786 EMIT(0x3A); | 786 EMIT(0x3A); |
787 emit_operand(dst, src); | 787 emit_operand(reg, op); |
788 } | 788 } |
789 | 789 |
790 | 790 |
791 void Assembler::cmpw(const Operand& op, Immediate imm16) { | 791 void Assembler::cmpw(const Operand& op, Immediate imm16) { |
792 ASSERT(imm16.is_int16()); | 792 ASSERT(imm16.is_int16()); |
793 EnsureSpace ensure_space(this); | 793 EnsureSpace ensure_space(this); |
794 EMIT(0x66); | 794 EMIT(0x66); |
795 EMIT(0x81); | 795 EMIT(0x81); |
796 emit_operand(edi, op); | 796 emit_operand(edi, op); |
797 emit_w(imm16); | 797 emit_w(imm16); |
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1180 } | 1180 } |
1181 | 1181 |
1182 | 1182 |
1183 void Assembler::xor_(Register dst, const Operand& src) { | 1183 void Assembler::xor_(Register dst, const Operand& src) { |
1184 EnsureSpace ensure_space(this); | 1184 EnsureSpace ensure_space(this); |
1185 EMIT(0x33); | 1185 EMIT(0x33); |
1186 emit_operand(dst, src); | 1186 emit_operand(dst, src); |
1187 } | 1187 } |
1188 | 1188 |
1189 | 1189 |
1190 void Assembler::xor_(const Operand& src, Register dst) { | 1190 void Assembler::xor_(const Operand& dst, Register src) { |
1191 EnsureSpace ensure_space(this); | 1191 EnsureSpace ensure_space(this); |
1192 EMIT(0x31); | 1192 EMIT(0x31); |
1193 emit_operand(dst, src); | 1193 emit_operand(src, dst); |
1194 } | 1194 } |
1195 | 1195 |
1196 | 1196 |
1197 void Assembler::xor_(const Operand& dst, const Immediate& x) { | 1197 void Assembler::xor_(const Operand& dst, const Immediate& x) { |
1198 EnsureSpace ensure_space(this); | 1198 EnsureSpace ensure_space(this); |
1199 emit_arith(6, dst, x); | 1199 emit_arith(6, dst, x); |
1200 } | 1200 } |
1201 | 1201 |
1202 | 1202 |
1203 void Assembler::bt(const Operand& dst, Register src) { | 1203 void Assembler::bt(const Operand& dst, Register src) { |
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2506 fprintf(coverage_log, "%s\n", file_line); | 2506 fprintf(coverage_log, "%s\n", file_line); |
2507 fflush(coverage_log); | 2507 fflush(coverage_log); |
2508 } | 2508 } |
2509 } | 2509 } |
2510 | 2510 |
2511 #endif | 2511 #endif |
2512 | 2512 |
2513 } } // namespace v8::internal | 2513 } } // namespace v8::internal |
2514 | 2514 |
2515 #endif // V8_TARGET_ARCH_IA32 | 2515 #endif // V8_TARGET_ARCH_IA32 |
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