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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 7890001: MIPS: pre-crankshaft updates to code-stubs and stub-cache (3/3) (Closed)
Patch Set: Added code-patching, cache-flushing related to InstanceofStub and other review comments. Created 9 years, 3 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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528 void PushSafepointRegistersAndDoubles(); 528 void PushSafepointRegistersAndDoubles();
529 void PopSafepointRegistersAndDoubles(); 529 void PopSafepointRegistersAndDoubles();
530 // Store value in register src in the safepoint stack slot for 530 // Store value in register src in the safepoint stack slot for
531 // register dst. 531 // register dst.
532 void StoreToSafepointRegisterSlot(Register src, Register dst); 532 void StoreToSafepointRegisterSlot(Register src, Register dst);
533 void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst); 533 void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst);
534 // Load the value of the src register from its safepoint stack slot 534 // Load the value of the src register from its safepoint stack slot
535 // into register dst. 535 // into register dst.
536 void LoadFromSafepointRegisterSlot(Register dst, Register src); 536 void LoadFromSafepointRegisterSlot(Register dst, Register src);
537 537
538 // Flush the I-cache from asm code. You should use CPU::FlushICache from C.
539 // Does not handle errors.
540 void FlushICache(Register address, unsigned instructions);
541
538 // MIPS32 R2 instruction macro. 542 // MIPS32 R2 instruction macro.
539 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size); 543 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
540 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size); 544 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
541 545
542 // Convert unsigned word to double. 546 // Convert unsigned word to double.
543 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch); 547 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch);
544 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch); 548 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
545 549
546 // Convert double to unsigned word. 550 // Convert double to unsigned word.
547 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch); 551 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch);
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1085 // Test that both first and second are sequential ASCII strings. 1089 // Test that both first and second are sequential ASCII strings.
1086 // Check that they are non-smis. 1090 // Check that they are non-smis.
1087 void JumpIfNotBothSequentialAsciiStrings(Register first, 1091 void JumpIfNotBothSequentialAsciiStrings(Register first,
1088 Register second, 1092 Register second,
1089 Register scratch1, 1093 Register scratch1,
1090 Register scratch2, 1094 Register scratch2,
1091 Label* failure); 1095 Label* failure);
1092 1096
1093 void LoadInstanceDescriptors(Register map, Register descriptors); 1097 void LoadInstanceDescriptors(Register map, Register descriptors);
1094 1098
1099 // Patch the relocated value (lui/ori pair).
1100 void PatchRelocatedValue(Register li_location,
1101 Register scratch,
1102 Register new_value);
1103
1095 private: 1104 private:
1096 void CallCFunctionHelper(Register function, 1105 void CallCFunctionHelper(Register function,
1097 ExternalReference function_reference, 1106 ExternalReference function_reference,
1098 Register scratch, 1107 Register scratch,
1099 int num_arguments); 1108 int num_arguments);
1100 1109
1101 void BranchShort(int16_t offset, BranchDelaySlot bdslot = PROTECT); 1110 void BranchShort(int16_t offset, BranchDelaySlot bdslot = PROTECT);
1102 void BranchShort(int16_t offset, Condition cond, Register rs, 1111 void BranchShort(int16_t offset, Condition cond, Register rs,
1103 const Operand& rt, 1112 const Operand& rt,
1104 BranchDelaySlot bdslot = PROTECT); 1113 BranchDelaySlot bdslot = PROTECT);
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1225 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 1234 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1226 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1235 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1227 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1236 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1228 #else 1237 #else
1229 #define ACCESS_MASM(masm) masm-> 1238 #define ACCESS_MASM(masm) masm->
1230 #endif 1239 #endif
1231 1240
1232 } } // namespace v8::internal 1241 } } // namespace v8::internal
1233 1242
1234 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1243 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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