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Issue 7888003: MIPS: pre-crankshaft updates to assembler and related files. (1/3) (Closed)
Patch Set: Created 9 years, 3 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 27
28 #include <stdlib.h> 28 #include <stdlib.h>
29 #include <math.h> 29 #include <math.h>
30 #include <limits.h> 30 #include <limits.h>
31 #include <cstdarg> 31 #include <cstdarg>
32 #include "v8.h" 32 #include "v8.h"
33 33
34 #if defined(V8_TARGET_ARCH_MIPS) 34 #if defined(V8_TARGET_ARCH_MIPS)
35 35
36 #include "cpu.h"
36 #include "disasm.h" 37 #include "disasm.h"
37 #include "assembler.h" 38 #include "assembler.h"
38 #include "globals.h" // Need the BitCast. 39 #include "globals.h" // Need the BitCast.
39 #include "mips/constants-mips.h" 40 #include "mips/constants-mips.h"
40 #include "mips/simulator-mips.h" 41 #include "mips/simulator-mips.h"
41 42
42 43
43 // Only build the simulator if not compiling for real MIPS hardware. 44 // Only build the simulator if not compiling for real MIPS hardware.
44 #if defined(USE_SIMULATOR) 45 #if defined(USE_SIMULATOR)
45 46
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1208 // interrupt is caused. On others it does a funky rotation thing. For now we 1209 // interrupt is caused. On others it does a funky rotation thing. For now we
1209 // simply disallow unaligned reads, but at some point we may want to move to 1210 // simply disallow unaligned reads, but at some point we may want to move to
1210 // emulating the rotate behaviour. Note that simulator runs have the runtime 1211 // emulating the rotate behaviour. Note that simulator runs have the runtime
1211 // system running directly on the host system and only generated code is 1212 // system running directly on the host system and only generated code is
1212 // executed in the simulator. Since the host is typically IA32 we will not 1213 // executed in the simulator. Since the host is typically IA32 we will not
1213 // get the correct MIPS-like behaviour on unaligned accesses. 1214 // get the correct MIPS-like behaviour on unaligned accesses.
1214 1215
1215 int Simulator::ReadW(int32_t addr, Instruction* instr) { 1216 int Simulator::ReadW(int32_t addr, Instruction* instr) {
1216 if (addr >=0 && addr < 0x400) { 1217 if (addr >=0 && addr < 0x400) {
1217 // This has to be a NULL-dereference, drop into debugger. 1218 // This has to be a NULL-dereference, drop into debugger.
1219 PrintF("Memory read from bad address: 0x%08x, pc=0x%08x\n",
1220 addr, reinterpret_cast<intptr_t>(instr));
1218 MipsDebugger dbg(this); 1221 MipsDebugger dbg(this);
1219 dbg.Debug(); 1222 dbg.Debug();
1220 } 1223 }
1221 if ((addr & kPointerAlignmentMask) == 0) { 1224 if ((addr & kPointerAlignmentMask) == 0) {
1222 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); 1225 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
1223 return *ptr; 1226 return *ptr;
1224 } 1227 }
1225 PrintF("Unaligned read at 0x%08x, pc=0x%08" V8PRIxPTR "\n", 1228 PrintF("Unaligned read at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1226 addr, 1229 addr,
1227 reinterpret_cast<intptr_t>(instr)); 1230 reinterpret_cast<intptr_t>(instr));
1228 MipsDebugger dbg(this); 1231 MipsDebugger dbg(this);
1229 dbg.Debug(); 1232 dbg.Debug();
1230 return 0; 1233 return 0;
1231 } 1234 }
1232 1235
1233 1236
1234 void Simulator::WriteW(int32_t addr, int value, Instruction* instr) { 1237 void Simulator::WriteW(int32_t addr, int value, Instruction* instr) {
1235 if (addr >= 0 && addr < 0x400) { 1238 if (addr >= 0 && addr < 0x400) {
1236 // This has to be a NULL-dereference, drop into debugger. 1239 // This has to be a NULL-dereference, drop into debugger.
1240 PrintF("Memory write to bad address: 0x%08x, pc=0x%08x\n",
1241 addr, reinterpret_cast<intptr_t>(instr));
1237 MipsDebugger dbg(this); 1242 MipsDebugger dbg(this);
1238 dbg.Debug(); 1243 dbg.Debug();
1239 } 1244 }
1240 if ((addr & kPointerAlignmentMask) == 0) { 1245 if ((addr & kPointerAlignmentMask) == 0) {
1241 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); 1246 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
1242 *ptr = value; 1247 *ptr = value;
1243 return; 1248 return;
1244 } 1249 }
1245 PrintF("Unaligned write at 0x%08x, pc=0x%08" V8PRIxPTR "\n", 1250 PrintF("Unaligned write at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1246 addr, 1251 addr,
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2812 } 2817 }
2813 2818
2814 2819
2815 #undef UNSUPPORTED 2820 #undef UNSUPPORTED
2816 2821
2817 } } // namespace v8::internal 2822 } } // namespace v8::internal
2818 2823
2819 #endif // USE_SIMULATOR 2824 #endif // USE_SIMULATOR
2820 2825
2821 #endif // V8_TARGET_ARCH_MIPS 2826 #endif // V8_TARGET_ARCH_MIPS
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