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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 105 void PrintSd(Instruction* instr); | 105 void PrintSd(Instruction* instr); |
| 106 void PrintSs1(Instruction* instr); | 106 void PrintSs1(Instruction* instr); |
| 107 void PrintSs2(Instruction* instr); | 107 void PrintSs2(Instruction* instr); |
| 108 void PrintBc(Instruction* instr); | 108 void PrintBc(Instruction* instr); |
| 109 void PrintCc(Instruction* instr); | 109 void PrintCc(Instruction* instr); |
| 110 void PrintFunction(Instruction* instr); | 110 void PrintFunction(Instruction* instr); |
| 111 void PrintSecondaryField(Instruction* instr); | 111 void PrintSecondaryField(Instruction* instr); |
| 112 void PrintUImm16(Instruction* instr); | 112 void PrintUImm16(Instruction* instr); |
| 113 void PrintSImm16(Instruction* instr); | 113 void PrintSImm16(Instruction* instr); |
| 114 void PrintXImm16(Instruction* instr); | 114 void PrintXImm16(Instruction* instr); |
| 115 void PrintImm26(Instruction* instr); | 115 void PrintXImm26(Instruction* instr); |
| 116 void PrintCode(Instruction* instr); // For break and trap instructions. | 116 void PrintCode(Instruction* instr); // For break and trap instructions. |
| 117 // Printing of instruction name. | 117 // Printing of instruction name. |
| 118 void PrintInstructionName(Instruction* instr); | 118 void PrintInstructionName(Instruction* instr); |
| 119 | 119 |
| 120 // Handle formatting of instructions and their options. | 120 // Handle formatting of instructions and their options. |
| 121 int FormatRegister(Instruction* instr, const char* option); | 121 int FormatRegister(Instruction* instr, const char* option); |
| 122 int FormatFPURegister(Instruction* instr, const char* option); | 122 int FormatFPURegister(Instruction* instr, const char* option); |
| 123 int FormatOption(Instruction* instr, const char* option); | 123 int FormatOption(Instruction* instr, const char* option); |
| 124 void Format(Instruction* instr, const char* format); | 124 void Format(Instruction* instr, const char* format); |
| 125 void Unknown(Instruction* instr); | 125 void Unknown(Instruction* instr); |
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| 266 | 266 |
| 267 | 267 |
| 268 // Print 16-bit hexa immediate value. | 268 // Print 16-bit hexa immediate value. |
| 269 void Decoder::PrintXImm16(Instruction* instr) { | 269 void Decoder::PrintXImm16(Instruction* instr) { |
| 270 int32_t imm = instr->Imm16Value(); | 270 int32_t imm = instr->Imm16Value(); |
| 271 out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); | 271 out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); |
| 272 } | 272 } |
| 273 | 273 |
| 274 | 274 |
| 275 // Print 26-bit immediate value. | 275 // Print 26-bit immediate value. |
| 276 void Decoder::PrintImm26(Instruction* instr) { | 276 void Decoder::PrintXImm26(Instruction* instr) { |
| 277 int32_t imm = instr->Imm26Value(); | 277 uint32_t imm = instr->Imm26Value() << kImmFieldShift; |
| 278 out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm); | 278 out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_, "0x%x", imm); |
| 279 } | 279 } |
| 280 | 280 |
| 281 | 281 |
| 282 // Print 26-bit immediate value. | 282 // Print 26-bit immediate value. |
| 283 void Decoder::PrintCode(Instruction* instr) { | 283 void Decoder::PrintCode(Instruction* instr) { |
| 284 if (instr->OpcodeFieldRaw() != SPECIAL) | 284 if (instr->OpcodeFieldRaw() != SPECIAL) |
| 285 return; // Not a break or trap instruction. | 285 return; // Not a break or trap instruction. |
| 286 switch (instr->FunctionFieldRaw()) { | 286 switch (instr->FunctionFieldRaw()) { |
| 287 case BREAK: { | 287 case BREAK: { |
| 288 int32_t code = instr->Bits(25, 6); | 288 int32_t code = instr->Bits(25, 6); |
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| 376 PrintSImm16(instr); | 376 PrintSImm16(instr); |
| 377 } else if (format[5] == 'u') { | 377 } else if (format[5] == 'u') { |
| 378 ASSERT(STRING_STARTS_WITH(format, "imm16u")); | 378 ASSERT(STRING_STARTS_WITH(format, "imm16u")); |
| 379 PrintSImm16(instr); | 379 PrintSImm16(instr); |
| 380 } else { | 380 } else { |
| 381 ASSERT(STRING_STARTS_WITH(format, "imm16x")); | 381 ASSERT(STRING_STARTS_WITH(format, "imm16x")); |
| 382 PrintXImm16(instr); | 382 PrintXImm16(instr); |
| 383 } | 383 } |
| 384 return 6; | 384 return 6; |
| 385 } else { | 385 } else { |
| 386 ASSERT(STRING_STARTS_WITH(format, "imm26")); | 386 ASSERT(STRING_STARTS_WITH(format, "imm26x")); |
| 387 PrintImm26(instr); | 387 PrintXImm26(instr); |
| 388 return 5; | 388 return 6; |
| 389 } | 389 } |
| 390 } | 390 } |
| 391 case 'r': { // 'r: registers. | 391 case 'r': { // 'r: registers. |
| 392 return FormatRegister(instr, format); | 392 return FormatRegister(instr, format); |
| 393 } | 393 } |
| 394 case 'f': { // 'f: FPUregisters. | 394 case 'f': { // 'f: FPUregisters. |
| 395 return FormatFPURegister(instr, format); | 395 return FormatFPURegister(instr, format); |
| 396 } | 396 } |
| 397 case 's': { // 'sa. | 397 case 's': { // 'sa. |
| 398 switch (format[1]) { | 398 switch (format[1]) { |
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| 919 default: | 919 default: |
| 920 UNREACHABLE(); | 920 UNREACHABLE(); |
| 921 break; | 921 break; |
| 922 }; | 922 }; |
| 923 } | 923 } |
| 924 | 924 |
| 925 | 925 |
| 926 void Decoder::DecodeTypeJump(Instruction* instr) { | 926 void Decoder::DecodeTypeJump(Instruction* instr) { |
| 927 switch (instr->OpcodeFieldRaw()) { | 927 switch (instr->OpcodeFieldRaw()) { |
| 928 case J: | 928 case J: |
| 929 Format(instr, "j 'imm26"); | 929 Format(instr, "j 'imm26x"); |
| 930 break; | 930 break; |
| 931 case JAL: | 931 case JAL: |
| 932 Format(instr, "jal 'imm26"); | 932 Format(instr, "jal 'imm26x"); |
| 933 break; | 933 break; |
| 934 default: | 934 default: |
| 935 UNREACHABLE(); | 935 UNREACHABLE(); |
| 936 } | 936 } |
| 937 } | 937 } |
| 938 | 938 |
| 939 | 939 |
| 940 // Disassemble the instruction at *instr_ptr into the output buffer. | 940 // Disassemble the instruction at *instr_ptr into the output buffer. |
| 941 int Decoder::InstructionDecode(byte* instr_ptr) { | 941 int Decoder::InstructionDecode(byte* instr_ptr) { |
| 942 Instruction* instr = Instruction::At(instr_ptr); | 942 Instruction* instr = Instruction::At(instr_ptr); |
| 943 // Print raw instruction bytes. | 943 // Print raw instruction bytes. |
| 944 out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_, | 944 out_buffer_pos_ += OS::SNPrintF(out_buffer_ + out_buffer_pos_, |
| 945 "%08x ", | 945 "%08x ", |
| 946 instr->InstructionBits()); | 946 instr->InstructionBits()); |
| 947 switch (instr->InstructionType()) { | 947 switch (instr->InstructionType()) { |
| 948 case Instruction::kRegisterType: { | 948 case Instruction::kRegisterType: { |
| 949 DecodeTypeRegister(instr); | 949 DecodeTypeRegister(instr); |
| 950 break; | 950 break; |
| 951 } | 951 } |
| 952 case Instruction::kImmediateType: { | 952 case Instruction::kImmediateType: { |
| 953 DecodeTypeImmediate(instr); | 953 DecodeTypeImmediate(instr); |
| 954 break; | 954 break; |
| 955 } | 955 } |
| 956 case Instruction::kJumpType: { | 956 case Instruction::kJumpType: { |
| 957 DecodeTypeJump(instr); | 957 DecodeTypeJump(instr); |
| 958 break; | 958 break; |
| 959 } | 959 } |
| 960 default: { | 960 default: { |
| 961 Format(instr, "UNSUPPORTED"); |
| 961 UNSUPPORTED_MIPS(); | 962 UNSUPPORTED_MIPS(); |
| 962 } | 963 } |
| 963 } | 964 } |
| 964 return Instruction::kInstrSize; | 965 return Instruction::kInstrSize; |
| 965 } | 966 } |
| 966 | 967 |
| 967 | 968 |
| 968 } } // namespace v8::internal | 969 } } // namespace v8::internal |
| 969 | 970 |
| 970 | 971 |
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| 1041 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); | 1042 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
| 1042 } | 1043 } |
| 1043 } | 1044 } |
| 1044 | 1045 |
| 1045 | 1046 |
| 1046 #undef UNSUPPORTED | 1047 #undef UNSUPPORTED |
| 1047 | 1048 |
| 1048 } // namespace disasm | 1049 } // namespace disasm |
| 1049 | 1050 |
| 1050 #endif // V8_TARGET_ARCH_MIPS | 1051 #endif // V8_TARGET_ARCH_MIPS |
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