Intial Thumb2 Sandbox (naclrev 6680)

src/trusted/validator_arm/testdata-thumb/test_stores.S

+@ Copyright 2009 The Native Client Authors.  All rights reserved.

[bsy, 2011/09/21 22:32:17]

was this a file rename from another location?  copy?  s/2009/2011/ if it is new
test data.

[jasonwkim, 2011/09/26 21:35:52]

done

+@ Use of this source code is governed by a BSD-style license that can
+@ be found in the LICENSE file.
+@ Copyright 2009 Google Inc.
+
+@
+@ Tests both legal and illegal variations on stores -- both stores that
+@ require masking, and stores that are guaranteed sandboxed (i.e. through SP)
+@
+
+@ we restrict store to the lower 1GB of the address space
+#define MASK 0xc0000000
+
+.syntax unified
+.code 16
+.thumb_func
+.global _start
+_start:
+bundle0:
+  bic r1, r3, #MASK       @ Generating a confined address
+  str r0, [r1]            @ and storing to it is fine.
+
+  bic r1, r1, #MASK       @ Confining an address in place
+  str r0, [r1]            @ and storing to it is fine.
+  nop
+  nop
+bundle1:
+  mov r1, r3              @ Just poking at the address
+  str r0, [r1]            @ and storing to it is an ERROR.
+
+  bic r1, r3, #0          @ Even if we use BIC, if the mask is wrong,
+  str r0, [r1]            @ still an ERROR.
+  nop
+  nop
+  nop
+
+bundle2:
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  bic r1, r3, #MASK       @ If the BIC is in a different bundle...
+
+bundle3:
+  str r0, [r1]            @ ...then the store is an ERROR.
+  itt eq
+
+  biceq r2, r2, #0xC0000000 @ Mask a register and
+  strexeq r0, r1, [r2]    @ use it in a store-exclusive.  Should pass.
+
+  nop
+  nop
+bundle4:
+  bic r2, r2, #0          @ Mask incorrectly and
+  strex r0, r1, [r2]      @ use it in a store-exclusive, for an ERROR.
+
+  nop
+  nop
+  nop
+  nop
+
+// Post indexing does not exist in Thumb
+/*
+bundle5:
+  bic r0, r0, #0xC0000000 @ Mask a register, and
+  str r1, [r0], r2        @ use it in register post-index store: should pass.
+  nop                     @ Don't mask, and
+  str r1, [r0], r2        @ use it in register post-index store: ERROR.
+ */
+
+// We don't have a conditional sandbox, so I've disabled all "valid" sequences
+conditional_sandbox:
+/*
+  tst r0, #0xC0000000     @ Set Z if the top two bits are clear, and
+  it eq
+  streq r1, [r0]          @ store: should work.
+*/
+
+  tst r0, #0xC0000000     @ Set Z if the top two bits are clear, and
+  str r1, [r0]            @ store unconditionally: ERROR.
+
+  tst r0, #0xC0000000     @ Set Z if the top two bits are clear, and
+  it gt
+  strgt r1, [r0]          @ store using wrong predicate: ERROR.
+
+  it eq
+  tsteq r0, #0xC0000000   @ Conditionally set Z if the top two bits are clear,
+  it gt
+  strgt r1, [r0]          @ and store using wrong predicate: ERROR.