Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(46)

Side by Side Diff: test/Transforms/ConstProp/X86/calls.ll

Issue 7792066: [llvm] Conditionally include target intrinsics, based on --enable-target Base URL: https://llvm.org/svn/llvm-project/llvm/trunk/
Patch Set: cleanups Created 9 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « test/Bitcode/ssse3_palignr.ll.bc ('k') | test/Transforms/ConstProp/X86/dg.exp » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; RUN: opt < %s -constprop -S | FileCheck %s 1 ; RUN: opt < %s -constprop -S | FileCheck %s
2 2
3 declare double @cos(double)
4
5 declare double @sin(double)
6
7 declare double @tan(double)
8
9 declare double @sqrt(double)
10 declare double @exp2(double)
11
12 define double @T() {
13 ; CHECK: @T
14 ; CHECK-NOT: call
15 ; CHECK: ret
16 %A = call double @cos(double 0.000000e+00)
17 %B = call double @sin(double 0.000000e+00)
18 %a = fadd double %A, %B
19 %C = call double @tan(double 0.000000e+00)
20 %b = fadd double %a, %C
21 %D = call double @sqrt(double 4.000000e+00)
22 %c = fadd double %b, %D
23
24 ; PR9315
25 %E = call double @exp2(double 4.0)
26 %d = fadd double %c, %E
27 ret double %d
28 }
29
30 define i1 @test_sse_cvt() nounwind readnone { 3 define i1 @test_sse_cvt() nounwind readnone {
31 ; CHECK: @test_sse_cvt 4 ; CHECK: @test_sse_cvt
32 ; CHECK-NOT: call 5 ; CHECK-NOT: call
33 ; CHECK: ret i1 true 6 ; CHECK: ret i1 true
34 entry: 7 entry:
35 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 1.75, float unde f, float undef, float undef>) nounwind 8 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 1.75, float unde f, float undef, float undef>) nounwind
36 %i1 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 1.75, float und ef, float undef, float undef>) nounwind 9 %i1 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 1.75, float und ef, float undef, float undef>) nounwind
37 %i2 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> <float 1.75, float un def, float undef, float undef>) nounwind 10 %i2 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> <float 1.75, float un def, float undef, float undef>) nounwind
38 %i3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> <float 1.75, float u ndef, float undef, float undef>) nounwind 11 %i3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> <float 1.75, float u ndef, float undef, float undef>) nounwind
39 %i4 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 1.75, double undef >) nounwind 12 %i4 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 1.75, double undef >) nounwind
(...skipping 12 matching lines...) Expand all
52 } 25 }
53 26
54 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone 27 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
55 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone 28 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
56 declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone 29 declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone
57 declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone 30 declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone
58 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone 31 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone
59 declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone 32 declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone
60 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone 33 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
61 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone 34 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
OLDNEW
« no previous file with comments | « test/Bitcode/ssse3_palignr.ll.bc ('k') | test/Transforms/ConstProp/X86/dg.exp » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698