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Side by Side Diff: lib/Transforms/InstCombine/InstCombineCalls.cpp

Issue 7792066: [llvm] Conditionally include target intrinsics, based on --enable-target Base URL: https://llvm.org/svn/llvm-project/llvm/trunk/
Patch Set: cleanups Created 9 years, 3 months ago
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1 //===- InstCombineCalls.cpp -----------------------------------------------===// 1 //===- InstCombineCalls.cpp -----------------------------------------------===//
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // The LLVM Compiler Infrastructure
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the visitCall and visitInvoke functions. 10 // This file implements the visitCall and visitInvoke functions.
(...skipping 527 matching lines...) Expand 10 before | Expand all | Expand 10 after
538 Constant *V[] = { 538 Constant *V[] = {
539 UndefValue::get(II->getArgOperand(0)->getType()), 539 UndefValue::get(II->getArgOperand(0)->getType()),
540 ConstantInt::getFalse(II->getContext()) 540 ConstantInt::getFalse(II->getContext())
541 }; 541 };
542 Constant *Struct = 542 Constant *Struct =
543 ConstantStruct::get(cast<StructType>(II->getType()), V); 543 ConstantStruct::get(cast<StructType>(II->getType()), V);
544 return InsertValueInst::Create(Struct, II->getArgOperand(0), 0); 544 return InsertValueInst::Create(Struct, II->getArgOperand(0), 0);
545 } 545 }
546 } 546 }
547 break; 547 break;
548 #if defined(TARGET_ENABLED_POWERPC)
548 case Intrinsic::ppc_altivec_lvx: 549 case Intrinsic::ppc_altivec_lvx:
549 case Intrinsic::ppc_altivec_lvxl: 550 case Intrinsic::ppc_altivec_lvxl:
550 // Turn PPC lvx -> load if the pointer is known aligned. 551 // Turn PPC lvx -> load if the pointer is known aligned.
551 if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, TD) >= 16) { 552 if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, TD) >= 16) {
552 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0), 553 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0),
553 PointerType::getUnqual(II->getType())); 554 PointerType::getUnqual(II->getType()));
554 return new LoadInst(Ptr); 555 return new LoadInst(Ptr);
555 } 556 }
556 break; 557 break;
557 case Intrinsic::ppc_altivec_stvx: 558 case Intrinsic::ppc_altivec_stvx:
558 case Intrinsic::ppc_altivec_stvxl: 559 case Intrinsic::ppc_altivec_stvxl:
559 // Turn stvx -> store if the pointer is known aligned. 560 // Turn stvx -> store if the pointer is known aligned.
560 if (getOrEnforceKnownAlignment(II->getArgOperand(1), 16, TD) >= 16) { 561 if (getOrEnforceKnownAlignment(II->getArgOperand(1), 16, TD) >= 16) {
561 Type *OpPtrTy = 562 Type *OpPtrTy =
562 PointerType::getUnqual(II->getArgOperand(0)->getType()); 563 PointerType::getUnqual(II->getArgOperand(0)->getType());
563 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy); 564 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
564 return new StoreInst(II->getArgOperand(0), Ptr); 565 return new StoreInst(II->getArgOperand(0), Ptr);
565 } 566 }
566 break; 567 break;
568 case Intrinsic::ppc_altivec_vperm:
569 // Turn vperm(V1,V2,mask) -> shuffle(V1,V2,mask) if mask is a constant.
570 if (ConstantVector *Mask = dyn_cast<ConstantVector>(II->getArgOperand(2))) {
571 assert(Mask->getNumOperands() == 16 && "Bad type for intrinsic!");
572
573 // Check that all of the elements are integer constants or undefs.
574 bool AllEltsOk = true;
575 for (unsigned i = 0; i != 16; ++i) {
576 if (!isa<ConstantInt>(Mask->getOperand(i)) &&
577 !isa<UndefValue>(Mask->getOperand(i))) {
578 AllEltsOk = false;
579 break;
580 }
581 }
582
583 if (AllEltsOk) {
584 // Cast the input vectors to byte vectors.
585 Value *Op0 = Builder->CreateBitCast(II->getArgOperand(0),
586 Mask->getType());
587 Value *Op1 = Builder->CreateBitCast(II->getArgOperand(1),
588 Mask->getType());
589 Value *Result = UndefValue::get(Op0->getType());
590
591 // Only extract each element once.
592 Value *ExtractedElts[32];
593 memset(ExtractedElts, 0, sizeof(ExtractedElts));
594
595 for (unsigned i = 0; i != 16; ++i) {
596 if (isa<UndefValue>(Mask->getOperand(i)))
597 continue;
598 unsigned Idx=cast<ConstantInt>(Mask->getOperand(i))->getZExtValue();
599 Idx &= 31; // Match the hardware behavior.
600
601 if (ExtractedElts[Idx] == 0) {
602 ExtractedElts[Idx] =
603 Builder->CreateExtractElement(Idx < 16 ? Op0 : Op1,
604 ConstantInt::get(Type::getInt32Ty(II->getContext()),
605 Idx&15, false), "tmp");
606 }
607
608 // Insert this value into the result vector.
609 Result = Builder->CreateInsertElement(Result, ExtractedElts[Idx],
610 ConstantInt::get(Type::getInt32Ty(II->getContext()),
611 i, false), "tmp");
612 }
613 return CastInst::Create(Instruction::BitCast, Result, CI.getType());
614 }
615 }
616 break;
617 #endif // TARGET_ENABLED_POWERPC
618
619 #if defined(TARGET_ENABLED_X86)
567 case Intrinsic::x86_sse_storeu_ps: 620 case Intrinsic::x86_sse_storeu_ps:
568 case Intrinsic::x86_sse2_storeu_pd: 621 case Intrinsic::x86_sse2_storeu_pd:
569 case Intrinsic::x86_sse2_storeu_dq: 622 case Intrinsic::x86_sse2_storeu_dq:
570 // Turn X86 storeu -> store if the pointer is known aligned. 623 // Turn X86 storeu -> store if the pointer is known aligned.
571 if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, TD) >= 16) { 624 if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, TD) >= 16) {
572 Type *OpPtrTy = 625 Type *OpPtrTy =
573 PointerType::getUnqual(II->getArgOperand(1)->getType()); 626 PointerType::getUnqual(II->getArgOperand(1)->getType());
574 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0), OpPtrTy); 627 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0), OpPtrTy);
575 return new StoreInst(II->getArgOperand(1), Ptr); 628 return new StoreInst(II->getArgOperand(1), Ptr);
576 } 629 }
(...skipping 14 matching lines...) Expand all
591 APInt DemandedElts(VWidth, 1); 644 APInt DemandedElts(VWidth, 1);
592 APInt UndefElts(VWidth, 0); 645 APInt UndefElts(VWidth, 0);
593 if (Value *V = SimplifyDemandedVectorElts(II->getArgOperand(0), 646 if (Value *V = SimplifyDemandedVectorElts(II->getArgOperand(0),
594 DemandedElts, UndefElts)) { 647 DemandedElts, UndefElts)) {
595 II->setArgOperand(0, V); 648 II->setArgOperand(0, V);
596 return II; 649 return II;
597 } 650 }
598 break; 651 break;
599 } 652 }
600 653
601
602 case Intrinsic::x86_sse41_pmovsxbw: 654 case Intrinsic::x86_sse41_pmovsxbw:
603 case Intrinsic::x86_sse41_pmovsxwd: 655 case Intrinsic::x86_sse41_pmovsxwd:
604 case Intrinsic::x86_sse41_pmovsxdq: 656 case Intrinsic::x86_sse41_pmovsxdq:
605 case Intrinsic::x86_sse41_pmovzxbw: 657 case Intrinsic::x86_sse41_pmovzxbw:
606 case Intrinsic::x86_sse41_pmovzxwd: 658 case Intrinsic::x86_sse41_pmovzxwd:
607 case Intrinsic::x86_sse41_pmovzxdq: { 659 case Intrinsic::x86_sse41_pmovzxdq: {
608 // pmov{s|z}x ignores the upper half of their input vectors. 660 // pmov{s|z}x ignores the upper half of their input vectors.
609 unsigned VWidth = 661 unsigned VWidth =
610 cast<VectorType>(II->getArgOperand(0)->getType())->getNumElements(); 662 cast<VectorType>(II->getArgOperand(0)->getType())->getNumElements();
611 unsigned LowHalfElts = VWidth / 2; 663 unsigned LowHalfElts = VWidth / 2;
612 APInt InputDemandedElts(APInt::getBitsSet(VWidth, 0, LowHalfElts)); 664 APInt InputDemandedElts(APInt::getBitsSet(VWidth, 0, LowHalfElts));
613 APInt UndefElts(VWidth, 0); 665 APInt UndefElts(VWidth, 0);
614 if (Value *TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), 666 if (Value *TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0),
615 InputDemandedElts, 667 InputDemandedElts,
616 UndefElts)) { 668 UndefElts)) {
617 II->setArgOperand(0, TmpV); 669 II->setArgOperand(0, TmpV);
618 return II; 670 return II;
619 } 671 }
620 break; 672 break;
621 } 673 }
674 #endif // TARGET_ENABLED_X86
622 675
623 case Intrinsic::ppc_altivec_vperm: 676 #if defined(TARGET_ENABLED_ARM)
624 // Turn vperm(V1,V2,mask) -> shuffle(V1,V2,mask) if mask is a constant.
625 if (ConstantVector *Mask = dyn_cast<ConstantVector>(II->getArgOperand(2))) {
626 assert(Mask->getNumOperands() == 16 && "Bad type for intrinsic!");
627
628 // Check that all of the elements are integer constants or undefs.
629 bool AllEltsOk = true;
630 for (unsigned i = 0; i != 16; ++i) {
631 if (!isa<ConstantInt>(Mask->getOperand(i)) &&
632 !isa<UndefValue>(Mask->getOperand(i))) {
633 AllEltsOk = false;
634 break;
635 }
636 }
637
638 if (AllEltsOk) {
639 // Cast the input vectors to byte vectors.
640 Value *Op0 = Builder->CreateBitCast(II->getArgOperand(0),
641 Mask->getType());
642 Value *Op1 = Builder->CreateBitCast(II->getArgOperand(1),
643 Mask->getType());
644 Value *Result = UndefValue::get(Op0->getType());
645
646 // Only extract each element once.
647 Value *ExtractedElts[32];
648 memset(ExtractedElts, 0, sizeof(ExtractedElts));
649
650 for (unsigned i = 0; i != 16; ++i) {
651 if (isa<UndefValue>(Mask->getOperand(i)))
652 continue;
653 unsigned Idx=cast<ConstantInt>(Mask->getOperand(i))->getZExtValue();
654 Idx &= 31; // Match the hardware behavior.
655
656 if (ExtractedElts[Idx] == 0) {
657 ExtractedElts[Idx] =
658 Builder->CreateExtractElement(Idx < 16 ? Op0 : Op1,
659 ConstantInt::get(Type::getInt32Ty(II->getContext()),
660 Idx&15, false), "tmp");
661 }
662
663 // Insert this value into the result vector.
664 Result = Builder->CreateInsertElement(Result, ExtractedElts[Idx],
665 ConstantInt::get(Type::getInt32Ty(II->getContext()),
666 i, false), "tmp");
667 }
668 return CastInst::Create(Instruction::BitCast, Result, CI.getType());
669 }
670 }
671 break;
672
673 case Intrinsic::arm_neon_vld1: 677 case Intrinsic::arm_neon_vld1:
674 case Intrinsic::arm_neon_vld2: 678 case Intrinsic::arm_neon_vld2:
675 case Intrinsic::arm_neon_vld3: 679 case Intrinsic::arm_neon_vld3:
676 case Intrinsic::arm_neon_vld4: 680 case Intrinsic::arm_neon_vld4:
677 case Intrinsic::arm_neon_vld2lane: 681 case Intrinsic::arm_neon_vld2lane:
678 case Intrinsic::arm_neon_vld3lane: 682 case Intrinsic::arm_neon_vld3lane:
679 case Intrinsic::arm_neon_vld4lane: 683 case Intrinsic::arm_neon_vld4lane:
680 case Intrinsic::arm_neon_vst1: 684 case Intrinsic::arm_neon_vst1:
681 case Intrinsic::arm_neon_vst2: 685 case Intrinsic::arm_neon_vst2:
682 case Intrinsic::arm_neon_vst3: 686 case Intrinsic::arm_neon_vst3:
683 case Intrinsic::arm_neon_vst4: 687 case Intrinsic::arm_neon_vst4:
684 case Intrinsic::arm_neon_vst2lane: 688 case Intrinsic::arm_neon_vst2lane:
685 case Intrinsic::arm_neon_vst3lane: 689 case Intrinsic::arm_neon_vst3lane:
686 case Intrinsic::arm_neon_vst4lane: { 690 case Intrinsic::arm_neon_vst4lane: {
687 unsigned MemAlign = getKnownAlignment(II->getArgOperand(0), TD); 691 unsigned MemAlign = getKnownAlignment(II->getArgOperand(0), TD);
688 unsigned AlignArg = II->getNumArgOperands() - 1; 692 unsigned AlignArg = II->getNumArgOperands() - 1;
689 ConstantInt *IntrAlign = dyn_cast<ConstantInt>(II->getArgOperand(AlignArg)); 693 ConstantInt *IntrAlign = dyn_cast<ConstantInt>(II->getArgOperand(AlignArg));
690 if (IntrAlign && IntrAlign->getZExtValue() < MemAlign) { 694 if (IntrAlign && IntrAlign->getZExtValue() < MemAlign) {
691 II->setArgOperand(AlignArg, 695 II->setArgOperand(AlignArg,
692 ConstantInt::get(Type::getInt32Ty(II->getContext()), 696 ConstantInt::get(Type::getInt32Ty(II->getContext()),
693 MemAlign, false)); 697 MemAlign, false));
694 return II; 698 return II;
695 } 699 }
696 break; 700 break;
697 } 701 }
702 #endif // TARGET_ENABLED_ARM
698 703
699 case Intrinsic::stackrestore: { 704 case Intrinsic::stackrestore: {
700 // If the save is right next to the restore, remove the restore. This can 705 // If the save is right next to the restore, remove the restore. This can
701 // happen when variable allocas are DCE'd. 706 // happen when variable allocas are DCE'd.
702 if (IntrinsicInst *SS = dyn_cast<IntrinsicInst>(II->getArgOperand(0))) { 707 if (IntrinsicInst *SS = dyn_cast<IntrinsicInst>(II->getArgOperand(0))) {
703 if (SS->getIntrinsicID() == Intrinsic::stacksave) { 708 if (SS->getIntrinsicID() == Intrinsic::stacksave) {
704 BasicBlock::iterator BI = SS; 709 BasicBlock::iterator BI = SS;
705 if (&*++BI == II) 710 if (&*++BI == II)
706 return EraseInstFromFunction(CI); 711 return EraseInstFromFunction(CI);
707 } 712 }
(...skipping 600 matching lines...) Expand 10 before | Expand all | Expand 10 after
1308 1313
1309 // Replace the trampoline call with a direct call. Since there is no 'nest' 1314 // Replace the trampoline call with a direct call. Since there is no 'nest'
1310 // parameter, there is no need to adjust the argument list. Let the generic 1315 // parameter, there is no need to adjust the argument list. Let the generic
1311 // code sort out any function type mismatches. 1316 // code sort out any function type mismatches.
1312 Constant *NewCallee = 1317 Constant *NewCallee =
1313 NestF->getType() == PTy ? NestF : 1318 NestF->getType() == PTy ? NestF :
1314 ConstantExpr::getBitCast(NestF, PTy); 1319 ConstantExpr::getBitCast(NestF, PTy);
1315 CS.setCalledFunction(NewCallee); 1320 CS.setCalledFunction(NewCallee);
1316 return CS.getInstruction(); 1321 return CS.getInstruction();
1317 } 1322 }
1318
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