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Side by Side Diff: lib/Analysis/BasicAliasAnalysis.cpp

Issue 7792066: [llvm] Conditionally include target intrinsics, based on --enable-target Base URL: https://llvm.org/svn/llvm-project/llvm/trunk/
Patch Set: cleanups Created 9 years, 3 months ago
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1 //===- BasicAliasAnalysis.cpp - Stateless Alias Analysis Impl -------------===// 1 //===- BasicAliasAnalysis.cpp - Stateless Alias Analysis Impl -------------===//
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // The LLVM Compiler Infrastructure
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file defines the primary stateless implementation of the 10 // This file defines the primary stateless implementation of the
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790 case Intrinsic::invariant_end: { 790 case Intrinsic::invariant_end: {
791 uint64_t PtrSize = 791 uint64_t PtrSize =
792 cast<ConstantInt>(II->getArgOperand(1))->getZExtValue(); 792 cast<ConstantInt>(II->getArgOperand(1))->getZExtValue();
793 if (isNoAlias(Location(II->getArgOperand(2), 793 if (isNoAlias(Location(II->getArgOperand(2),
794 PtrSize, 794 PtrSize,
795 II->getMetadata(LLVMContext::MD_tbaa)), 795 II->getMetadata(LLVMContext::MD_tbaa)),
796 Loc)) 796 Loc))
797 return NoModRef; 797 return NoModRef;
798 break; 798 break;
799 } 799 }
800 #if defined(TARGET_ENABLED_ARM)
800 case Intrinsic::arm_neon_vld1: { 801 case Intrinsic::arm_neon_vld1: {
801 // LLVM's vld1 and vst1 intrinsics currently only support a single 802 // LLVM's vld1 and vst1 intrinsics currently only support a single
802 // vector register. 803 // vector register.
803 uint64_t Size = 804 uint64_t Size =
804 TD ? TD->getTypeStoreSize(II->getType()) : UnknownSize; 805 TD ? TD->getTypeStoreSize(II->getType()) : UnknownSize;
805 if (isNoAlias(Location(II->getArgOperand(0), Size, 806 if (isNoAlias(Location(II->getArgOperand(0), Size,
806 II->getMetadata(LLVMContext::MD_tbaa)), 807 II->getMetadata(LLVMContext::MD_tbaa)),
807 Loc)) 808 Loc))
808 return NoModRef; 809 return NoModRef;
809 break; 810 break;
810 } 811 }
811 case Intrinsic::arm_neon_vst1: { 812 case Intrinsic::arm_neon_vst1: {
812 uint64_t Size = 813 uint64_t Size =
813 TD ? TD->getTypeStoreSize(II->getArgOperand(1)->getType()) : UnknownSize ; 814 TD ? TD->getTypeStoreSize(II->getArgOperand(1)->getType()) : UnknownSize ;
814 if (isNoAlias(Location(II->getArgOperand(0), Size, 815 if (isNoAlias(Location(II->getArgOperand(0), Size,
815 II->getMetadata(LLVMContext::MD_tbaa)), 816 II->getMetadata(LLVMContext::MD_tbaa)),
816 Loc)) 817 Loc))
817 return NoModRef; 818 return NoModRef;
818 break; 819 break;
819 } 820 }
821 #endif // TARGET_ENABLED_ARM
820 } 822 }
821 823
822 // The AliasAnalysis base class has some smarts, lets use them. 824 // The AliasAnalysis base class has some smarts, lets use them.
823 return ModRefResult(AliasAnalysis::getModRefInfo(CS, Loc) & Min); 825 return ModRefResult(AliasAnalysis::getModRefInfo(CS, Loc) & Min);
824 } 826 }
825 827
826 /// aliasGEP - Provide a bunch of ad-hoc rules to disambiguate a GEP instruction 828 /// aliasGEP - Provide a bunch of ad-hoc rules to disambiguate a GEP instruction
827 /// against another pointer. We know that V1 is a GEP, but we don't know 829 /// against another pointer. We know that V1 is a GEP, but we don't know
828 /// anything about V2. UnderlyingV1 is GetUnderlyingObject(GEP1, TD), 830 /// anything about V2. UnderlyingV1 is GetUnderlyingObject(GEP1, TD),
829 /// UnderlyingV2 is the same for V2. 831 /// UnderlyingV2 is the same for V2.
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1205 if (TD && O1 == O2) 1207 if (TD && O1 == O2)
1206 if ((V1Size != UnknownSize && isObjectSize(O1, V1Size, *TD)) || 1208 if ((V1Size != UnknownSize && isObjectSize(O1, V1Size, *TD)) ||
1207 (V2Size != UnknownSize && isObjectSize(O2, V2Size, *TD))) 1209 (V2Size != UnknownSize && isObjectSize(O2, V2Size, *TD)))
1208 return AliasCache[Locs] = PartialAlias; 1210 return AliasCache[Locs] = PartialAlias;
1209 1211
1210 AliasResult Result = 1212 AliasResult Result =
1211 AliasAnalysis::alias(Location(V1, V1Size, V1TBAAInfo), 1213 AliasAnalysis::alias(Location(V1, V1Size, V1TBAAInfo),
1212 Location(V2, V2Size, V2TBAAInfo)); 1214 Location(V2, V2Size, V2TBAAInfo));
1213 return AliasCache[Locs] = Result; 1215 return AliasCache[Locs] = Result;
1214 } 1216 }
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