MIPS: Fix KeyedStoreStubCompiler::GenerateStoreFastDoubleElement()

src/mips/stub-cache-mips.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 4410 matching lines @@
   __ Branch(&maybe_nan, ge, exponent_reg, Operand(scratch));
 
   __ lw(mantissa_reg, FieldMemOperand(value_reg, HeapNumber::kMantissaOffset));
 
   __ bind(&have_double_value);
   __ sll(scratch4, key_reg, kDoubleSizeLog2 - kSmiTagSize);
   __ Addu(scratch, elements_reg, Operand(scratch4));
   __ sw(mantissa_reg, FieldMemOperand(scratch, FixedDoubleArray::kHeaderSize));
   uint32_t offset = FixedDoubleArray::kHeaderSize + sizeof(kHoleNanLower32);
   __ sw(exponent_reg, FieldMemOperand(scratch, offset));
-  __ Ret();
+  __ Ret(USE_DELAY_SLOT);
+  __ mov(v0, value_reg);  // In delay slot.
 
   __ bind(&maybe_nan);
   // Could be NaN or Infinity. If fraction is not zero, it's NaN, otherwise
   // it's an Infinity, and the non-NaN code path applies.
   __ li(scratch, Operand(kNaNOrInfinityLowerBoundUpper32));
   __ Branch(&is_nan, gt, exponent_reg, Operand(scratch));
   __ lw(mantissa_reg, FieldMemOperand(value_reg, HeapNumber::kMantissaOffset));
   __ Branch(&have_double_value, eq, mantissa_reg, Operand(zero_reg));
 
   __ bind(&is_nan);
@@ skipping 29 matching lines @@
       exponent_reg,
       scratch4,
       f2);
   if (destination == FloatingPointHelper::kFPURegisters) {
     CpuFeatures::Scope scope(FPU);
     __ sdc1(f0, MemOperand(scratch, 0));
   } else {
     __ sw(mantissa_reg, MemOperand(scratch, 0));
     __ sw(exponent_reg, MemOperand(scratch, Register::kSizeInBytes));
   }
-  __ Ret();
+  __ Ret(USE_DELAY_SLOT);
+  __ mov(v0, value_reg);  // In delay slot.
 
   // Handle store cache miss, replacing the ic with the generic stub.
   __ bind(&miss_force_generic);
   Handle<Code> ic =
       masm->isolate()->builtins()->KeyedStoreIC_MissForceGeneric();
   __ Jump(ic, RelocInfo::CODE_TARGET);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS