MIPS: Fixed and optimized MacroAssembler::Trunc_uw_d, Cvt_d_uw, Ext, Ins.

test/cctest/test-assembler-mips.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1065 matching lines @@
     uint32_t cvt_small_in;
   } T;
   T t;
 
   MacroAssembler assm(Isolate::Current(), NULL, 0);
 
   if (CpuFeatures::IsSupported(FPU)) {
     CpuFeatures::Scope scope(FPU);
 
     __ sw(t0, MemOperand(a0, OFFSET_OF(T, cvt_small_in)));
-    __ Cvt_d_uw(f10, t0);
+    __ Cvt_d_uw(f10, t0, f22);
     __ sdc1(f10, MemOperand(a0, OFFSET_OF(T, cvt_small_out)));
 
-    __ Trunc_uw_d(f10, f10);
+    __ Trunc_uw_d(f10, f10, f22);
     __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out)));
 
     __ sw(t0, MemOperand(a0, OFFSET_OF(T, cvt_big_in)));
-    __ Cvt_d_uw(f8, t0);
+    __ Cvt_d_uw(f8, t0, f22);
     __ sdc1(f8, MemOperand(a0, OFFSET_OF(T, cvt_big_out)));
 
-    __ Trunc_uw_d(f8, f8);
+    __ Trunc_uw_d(f8, f8, f22);
     __ swc1(f8, MemOperand(a0, OFFSET_OF(T, trunc_big_out)));
 
     __ jr(ra);
     __ nop();
 
     CodeDesc desc;
     assm.GetCode(&desc);
     Object* code = HEAP->CreateCode(
         desc,
         Code::ComputeFlags(Code::STUB),
@@ skipping 146 matching lines @@
   CHECK_EQ(kFPUInvalidResult, t.type##_invalid_result);
 
     CHECK_ROUND_RESULT(round);
     CHECK_ROUND_RESULT(floor);
     CHECK_ROUND_RESULT(ceil);
     CHECK_ROUND_RESULT(cvt);
   }
 }
 
 #undef __