Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(2)

Side by Side Diff: test/cctest/test-assembler-mips.cc

Issue 7741016: Land two MIPS changes contributed by Paul Lind. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 9 years, 4 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/mips/stub-cache-mips.cc ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 1065 matching lines...) Expand 10 before | Expand all | Expand 10 after
1076 uint32_t cvt_small_in; 1076 uint32_t cvt_small_in;
1077 } T; 1077 } T;
1078 T t; 1078 T t;
1079 1079
1080 MacroAssembler assm(Isolate::Current(), NULL, 0); 1080 MacroAssembler assm(Isolate::Current(), NULL, 0);
1081 1081
1082 if (CpuFeatures::IsSupported(FPU)) { 1082 if (CpuFeatures::IsSupported(FPU)) {
1083 CpuFeatures::Scope scope(FPU); 1083 CpuFeatures::Scope scope(FPU);
1084 1084
1085 __ sw(t0, MemOperand(a0, OFFSET_OF(T, cvt_small_in))); 1085 __ sw(t0, MemOperand(a0, OFFSET_OF(T, cvt_small_in)));
1086 __ Cvt_d_uw(f10, t0); 1086 __ Cvt_d_uw(f10, t0, f22);
1087 __ sdc1(f10, MemOperand(a0, OFFSET_OF(T, cvt_small_out))); 1087 __ sdc1(f10, MemOperand(a0, OFFSET_OF(T, cvt_small_out)));
1088 1088
1089 __ Trunc_uw_d(f10, f10); 1089 __ Trunc_uw_d(f10, f10, f22);
1090 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out))); 1090 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out)));
1091 1091
1092 __ sw(t0, MemOperand(a0, OFFSET_OF(T, cvt_big_in))); 1092 __ sw(t0, MemOperand(a0, OFFSET_OF(T, cvt_big_in)));
1093 __ Cvt_d_uw(f8, t0); 1093 __ Cvt_d_uw(f8, t0, f22);
1094 __ sdc1(f8, MemOperand(a0, OFFSET_OF(T, cvt_big_out))); 1094 __ sdc1(f8, MemOperand(a0, OFFSET_OF(T, cvt_big_out)));
1095 1095
1096 __ Trunc_uw_d(f8, f8); 1096 __ Trunc_uw_d(f8, f8, f22);
1097 __ swc1(f8, MemOperand(a0, OFFSET_OF(T, trunc_big_out))); 1097 __ swc1(f8, MemOperand(a0, OFFSET_OF(T, trunc_big_out)));
1098 1098
1099 __ jr(ra); 1099 __ jr(ra);
1100 __ nop(); 1100 __ nop();
1101 1101
1102 CodeDesc desc; 1102 CodeDesc desc;
1103 assm.GetCode(&desc); 1103 assm.GetCode(&desc);
1104 Object* code = HEAP->CreateCode( 1104 Object* code = HEAP->CreateCode(
1105 desc, 1105 desc,
1106 Code::ComputeFlags(Code::STUB), 1106 Code::ComputeFlags(Code::STUB),
(...skipping 146 matching lines...) Expand 10 before | Expand all | Expand 10 after
1253 CHECK_EQ(kFPUInvalidResult, t.type##_invalid_result); 1253 CHECK_EQ(kFPUInvalidResult, t.type##_invalid_result);
1254 1254
1255 CHECK_ROUND_RESULT(round); 1255 CHECK_ROUND_RESULT(round);
1256 CHECK_ROUND_RESULT(floor); 1256 CHECK_ROUND_RESULT(floor);
1257 CHECK_ROUND_RESULT(ceil); 1257 CHECK_ROUND_RESULT(ceil);
1258 CHECK_ROUND_RESULT(cvt); 1258 CHECK_ROUND_RESULT(cvt);
1259 } 1259 }
1260 } 1260 }
1261 1261
1262 #undef __ 1262 #undef __
OLDNEW
« no previous file with comments | « src/mips/stub-cache-mips.cc ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698