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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 7741016: Land two MIPS changes contributed by Paul Lind. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 9 years, 4 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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517 void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst); 517 void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst);
518 // Load the value of the src register from its safepoint stack slot 518 // Load the value of the src register from its safepoint stack slot
519 // into register dst. 519 // into register dst.
520 void LoadFromSafepointRegisterSlot(Register dst, Register src); 520 void LoadFromSafepointRegisterSlot(Register dst, Register src);
521 521
522 // MIPS32 R2 instruction macro. 522 // MIPS32 R2 instruction macro.
523 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size); 523 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
524 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size); 524 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
525 525
526 // Convert unsigned word to double. 526 // Convert unsigned word to double.
527 void Cvt_d_uw(FPURegister fd, FPURegister fs); 527 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch);
528 void Cvt_d_uw(FPURegister fd, Register rs); 528 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
529 529
530 // Convert double to unsigned word. 530 // Convert double to unsigned word.
531 void Trunc_uw_d(FPURegister fd, FPURegister fs); 531 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch);
532 void Trunc_uw_d(FPURegister fd, Register rs); 532 void Trunc_uw_d(FPURegister fd, Register rs, FPURegister scratch);
533 533
534 // Convert the HeapNumber pointed to by source to a 32bits signed integer 534 // Convert the HeapNumber pointed to by source to a 32bits signed integer
535 // dest. If the HeapNumber does not fit into a 32bits signed integer branch 535 // dest. If the HeapNumber does not fit into a 32bits signed integer branch
536 // to not_int32 label. If FPU is available double_scratch is used but not 536 // to not_int32 label. If FPU is available double_scratch is used but not
537 // scratch2. 537 // scratch2.
538 void ConvertToInt32(Register source, 538 void ConvertToInt32(Register source,
539 Register dest, 539 Register dest,
540 Register scratch, 540 Register scratch,
541 Register scratch2, 541 Register scratch2,
542 FPURegister double_scratch, 542 FPURegister double_scratch,
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1210 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 1210 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1211 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1211 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1212 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1212 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1213 #else 1213 #else
1214 #define ACCESS_MASM(masm) masm-> 1214 #define ACCESS_MASM(masm) masm->
1215 #endif 1215 #endif
1216 1216
1217 } } // namespace v8::internal 1217 } } // namespace v8::internal
1218 1218
1219 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1219 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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