Land two MIPS changes contributed by Paul Lind.

src/mips/code-stubs-mips.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 2488 matching lines @@
       // Nothing can go wrong now, so move the heap number to v0, which is the
       // result.
       __ mov(v0, t1);
 
       if (CpuFeatures::IsSupported(FPU)) {
         // Convert the int32 in a2 to the heap number in a0. As
         // mentioned above SHR needs to always produce a positive result.
         CpuFeatures::Scope scope(FPU);
         __ mtc1(a2, f0);
         if (op_ == Token::SHR) {
-          __ Cvt_d_uw(f0, f0);
+          __ Cvt_d_uw(f0, f0, f22);
         } else {
           __ cvt_d_w(f0, f0);
         }
         // ARM uses a workaround here because of the unaligned HeapNumber
         // kValueOffset. On MIPS this workaround is built into sdc1 so
         // there's no point in generating even more instructions.
         __ sdc1(f0, FieldMemOperand(v0, HeapNumber::kValueOffset));
         __ Ret();
       } else {
         // Tail call that writes the int32 in a2 to the heap number in v0, using
@@ skipping 393 matching lines @@
       if (CpuFeatures::IsSupported(FPU)) {
         CpuFeatures::Scope scope(FPU);
 
         if (op_ != Token::SHR) {
           // Convert the result to a floating point value.
           __ mtc1(a2, double_scratch);
           __ cvt_d_w(double_scratch, double_scratch);
         } else {
           // The result must be interpreted as an unsigned 32-bit integer.
           __ mtc1(a2, double_scratch);
-          __ Cvt_d_uw(double_scratch, double_scratch);
+          __ Cvt_d_uw(double_scratch, double_scratch, single_scratch);
         }
 
         // Store the result.
         __ mov(v0, heap_number_result);
         __ sdc1(double_scratch, FieldMemOperand(v0, HeapNumber::kValueOffset));
         __ Ret();
       } else {
         // Tail call that writes the int32 in a2 to the heap number in v0, using
         // a3 and a1 as scratch. v0 is preserved and returned.
         __ mov(a0, t1);
@@ skipping 3887 matching lines @@
   __ mov(result, zero_reg);
   __ Ret();
 }
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_MIPS