Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(85)

Side by Side Diff: test/cctest/test-assembler-mips.cc

Issue 7739019: Landing: MIPS: Fixed some mips32r1-specific test failures. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 9 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | test/cctest/test-disasm-mips.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 756 matching lines...) Expand 10 before | Expand all | Expand 10 after
767 int32_t long_hi; 767 int32_t long_hi;
768 int32_t long_lo; 768 int32_t long_lo;
769 int32_t b_long_hi; 769 int32_t b_long_hi;
770 int32_t b_long_lo; 770 int32_t b_long_lo;
771 } T; 771 } T;
772 T t; 772 T t;
773 773
774 Assembler assm(Isolate::Current(), NULL, 0); 774 Assembler assm(Isolate::Current(), NULL, 0);
775 Label L, C; 775 Label L, C;
776 776
777 if (CpuFeatures::IsSupported(FPU)) { 777 if (CpuFeatures::IsSupported(FPU) && mips32r2) {
778 CpuFeatures::Scope scope(FPU); 778 CpuFeatures::Scope scope(FPU);
779 779
780 // Load all structure elements to registers. 780 // Load all structure elements to registers.
781 __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, a))); 781 __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, a)));
782 782
783 // Save the raw bits of the double. 783 // Save the raw bits of the double.
784 __ mfc1(t0, f0); 784 __ mfc1(t0, f0);
785 __ mfc1(t1, f1); 785 __ mfc1(t1, f1);
786 __ sw(t0, MemOperand(a0, OFFSET_OF(T, dbl_mant))); 786 __ sw(t0, MemOperand(a0, OFFSET_OF(T, dbl_mant)));
787 __ sw(t1, MemOperand(a0, OFFSET_OF(T, dbl_exp))); 787 __ sw(t1, MemOperand(a0, OFFSET_OF(T, dbl_exp)));
(...skipping 481 matching lines...) Expand 10 before | Expand all | Expand 10 after
1269 Label target; 1269 Label target;
1270 __ beq(v0, v1, &target); 1270 __ beq(v0, v1, &target);
1271 __ nop(); 1271 __ nop();
1272 __ bne(v0, v1, &target); 1272 __ bne(v0, v1, &target);
1273 __ nop(); 1273 __ nop();
1274 __ bind(&target); 1274 __ bind(&target);
1275 __ nop(); 1275 __ nop();
1276 } 1276 }
1277 1277
1278 #undef __ 1278 #undef __
OLDNEW
« no previous file with comments | « no previous file | test/cctest/test-disasm-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698