add llvm configure flags to enable/disable target OSes/Envs

lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp

 //===-- ARM/ARMMCCodeEmitter.cpp - Convert ARM code to machine code -------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the ARMMCCodeEmitter class.
@@ skipping 38 matching lines @@
 
   bool isThumb() const {
     // FIXME: Can tablegen auto-generate this?
     return (STI.getFeatureBits() & ARM::ModeThumb) != 0;
   }
   bool isThumb2() const {
     return isThumb() && (STI.getFeatureBits() & ARM::FeatureThumb2) != 0;
   }
   bool isTargetDarwin() const {
     Triple TT(STI.getTargetTriple());
-    Triple::OSType OS = TT.getOS();
-    return OS == Triple::Darwin || OS == Triple::MacOSX || OS == Triple::IOS;
+    return TT.isOSDarwin();
   }
 
   unsigned getMachineSoImmOpValue(unsigned SoImm) const;
 
   // getBinaryCodeForInstr - TableGen'erated function for getting the
   // binary encoding for an instruction.
   unsigned getBinaryCodeForInstr(const MCInst &MI,
                                  SmallVectorImpl<MCFixup> &Fixups) const;
 
   /// getMachineOpValue - Return binary encoding of operand. If the machine
@@ skipping 1251 matching lines @@
   // first.
   if (isThumb() && Size == 4) {
     EmitConstant(Binary >> 16, 2, OS);
     EmitConstant(Binary & 0xffff, 2, OS);
   } else
     EmitConstant(Binary, Size, OS);
   ++MCNumEmitted;  // Keep track of the # of mi's emitted.
 }
 
 #include "ARMGenMCCodeEmitter.inc"