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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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193 } | 193 } |
194 | 194 |
195 // Print the VFP D register name according to the active name converter. | 195 // Print the VFP D register name according to the active name converter. |
196 void Decoder::PrintDRegister(int reg) { | 196 void Decoder::PrintDRegister(int reg) { |
197 Print(VFPRegisters::Name(reg, true)); | 197 Print(VFPRegisters::Name(reg, true)); |
198 } | 198 } |
199 | 199 |
200 | 200 |
201 // These shift names are defined in a way to match the native disassembler | 201 // These shift names are defined in a way to match the native disassembler |
202 // formatting. See for example the command "objdump -d <binary file>". | 202 // formatting. See for example the command "objdump -d <binary file>". |
203 static const char* shift_names[kNumberOfShifts] = { | 203 static const char* const shift_names[kNumberOfShifts] = { |
204 "lsl", "lsr", "asr", "ror" | 204 "lsl", "lsr", "asr", "ror" |
205 }; | 205 }; |
206 | 206 |
207 | 207 |
208 // Print the register shift operands for the instruction. Generally used for | 208 // Print the register shift operands for the instruction. Generally used for |
209 // data processing instructions. | 209 // data processing instructions. |
210 void Decoder::PrintShiftRm(Instruction* instr) { | 210 void Decoder::PrintShiftRm(Instruction* instr) { |
211 ShiftOp shift = instr->ShiftField(); | 211 ShiftOp shift = instr->ShiftField(); |
212 int shift_index = instr->ShiftValue(); | 212 int shift_index = instr->ShiftValue(); |
213 int shift_amount = instr->ShiftAmountValue(); | 213 int shift_amount = instr->ShiftAmountValue(); |
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1497 pc += d.InstructionDecode(buffer, pc); | 1497 pc += d.InstructionDecode(buffer, pc); |
1498 fprintf(f, "%p %08x %s\n", | 1498 fprintf(f, "%p %08x %s\n", |
1499 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); | 1499 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
1500 } | 1500 } |
1501 } | 1501 } |
1502 | 1502 |
1503 | 1503 |
1504 } // namespace disasm | 1504 } // namespace disasm |
1505 | 1505 |
1506 #endif // V8_TARGET_ARCH_ARM | 1506 #endif // V8_TARGET_ARCH_ARM |
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