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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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302 mov(ip, Operand(handle)); | 302 mov(ip, Operand(handle)); |
303 push(ip); | 303 push(ip); |
304 } | 304 } |
305 | 305 |
306 | 306 |
307 void MacroAssembler::Move(Register dst, Handle<Object> value) { | 307 void MacroAssembler::Move(Register dst, Handle<Object> value) { |
308 mov(dst, Operand(value)); | 308 mov(dst, Operand(value)); |
309 } | 309 } |
310 | 310 |
311 | 311 |
312 void MacroAssembler::Move(Register dst, Register src) { | 312 void MacroAssembler::Move(Register dst, Register src, Condition cond) { |
313 if (!dst.is(src)) { | 313 if (!dst.is(src)) { |
314 mov(dst, src); | 314 mov(dst, src, LeaveCC, cond); |
315 } | 315 } |
316 } | 316 } |
317 | 317 |
318 | 318 |
319 void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) { | 319 void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) { |
320 ASSERT(CpuFeatures::IsSupported(VFP3)); | 320 ASSERT(CpuFeatures::IsSupported(VFP3)); |
321 CpuFeatures::Scope scope(VFP3); | 321 CpuFeatures::Scope scope(VFP3); |
322 if (!dst.is(src)) { | 322 if (!dst.is(src)) { |
323 vmov(dst, src); | 323 vmov(dst, src); |
324 } | 324 } |
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748 | 748 |
749 void MacroAssembler::VFPCompareAndLoadFlags(const DwVfpRegister src1, | 749 void MacroAssembler::VFPCompareAndLoadFlags(const DwVfpRegister src1, |
750 const double src2, | 750 const double src2, |
751 const Register fpscr_flags, | 751 const Register fpscr_flags, |
752 const Condition cond) { | 752 const Condition cond) { |
753 // Compare and load FPSCR. | 753 // Compare and load FPSCR. |
754 vcmp(src1, src2, cond); | 754 vcmp(src1, src2, cond); |
755 vmrs(fpscr_flags, cond); | 755 vmrs(fpscr_flags, cond); |
756 } | 756 } |
757 | 757 |
| 758 void MacroAssembler::Vmov(const DwVfpRegister dst, |
| 759 const double imm, |
| 760 const Condition cond) { |
| 761 ASSERT(CpuFeatures::IsEnabled(VFP3)); |
| 762 static const DoubleRepresentation minus_zero(-0.0); |
| 763 static const DoubleRepresentation zero(0.0); |
| 764 DoubleRepresentation value(imm); |
| 765 // Handle special values first. |
| 766 if (value.bits == zero.bits) { |
| 767 vmov(dst, kDoubleRegZero, cond); |
| 768 } else if (value.bits == minus_zero.bits) { |
| 769 vneg(dst, kDoubleRegZero, cond); |
| 770 } else { |
| 771 vmov(dst, imm, cond); |
| 772 } |
| 773 } |
| 774 |
758 | 775 |
759 void MacroAssembler::EnterFrame(StackFrame::Type type) { | 776 void MacroAssembler::EnterFrame(StackFrame::Type type) { |
760 // r0-r3: preserved | 777 // r0-r3: preserved |
761 stm(db_w, sp, cp.bit() | fp.bit() | lr.bit()); | 778 stm(db_w, sp, cp.bit() | fp.bit() | lr.bit()); |
762 mov(ip, Operand(Smi::FromInt(type))); | 779 mov(ip, Operand(Smi::FromInt(type))); |
763 push(ip); | 780 push(ip); |
764 mov(ip, Operand(CodeObject())); | 781 mov(ip, Operand(CodeObject())); |
765 push(ip); | 782 push(ip); |
766 add(fp, sp, Operand(3 * kPointerSize)); // Adjust FP to point to saved FP. | 783 add(fp, sp, Operand(3 * kPointerSize)); // Adjust FP to point to saved FP. |
767 } | 784 } |
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3105 } | 3122 } |
3106 | 3123 |
3107 | 3124 |
3108 void MacroAssembler::ClampDoubleToUint8(Register result_reg, | 3125 void MacroAssembler::ClampDoubleToUint8(Register result_reg, |
3109 DoubleRegister input_reg, | 3126 DoubleRegister input_reg, |
3110 DoubleRegister temp_double_reg) { | 3127 DoubleRegister temp_double_reg) { |
3111 Label above_zero; | 3128 Label above_zero; |
3112 Label done; | 3129 Label done; |
3113 Label in_bounds; | 3130 Label in_bounds; |
3114 | 3131 |
3115 vmov(temp_double_reg, 0.0); | 3132 Vmov(temp_double_reg, 0.0); |
3116 VFPCompareAndSetFlags(input_reg, temp_double_reg); | 3133 VFPCompareAndSetFlags(input_reg, temp_double_reg); |
3117 b(gt, &above_zero); | 3134 b(gt, &above_zero); |
3118 | 3135 |
3119 // Double value is less than zero, NaN or Inf, return 0. | 3136 // Double value is less than zero, NaN or Inf, return 0. |
3120 mov(result_reg, Operand(0)); | 3137 mov(result_reg, Operand(0)); |
3121 b(al, &done); | 3138 b(al, &done); |
3122 | 3139 |
3123 // Double value is >= 255, return 255. | 3140 // Double value is >= 255, return 255. |
3124 bind(&above_zero); | 3141 bind(&above_zero); |
3125 vmov(temp_double_reg, 255.0); | 3142 Vmov(temp_double_reg, 255.0); |
3126 VFPCompareAndSetFlags(input_reg, temp_double_reg); | 3143 VFPCompareAndSetFlags(input_reg, temp_double_reg); |
3127 b(le, &in_bounds); | 3144 b(le, &in_bounds); |
3128 mov(result_reg, Operand(255)); | 3145 mov(result_reg, Operand(255)); |
3129 b(al, &done); | 3146 b(al, &done); |
3130 | 3147 |
3131 // In 0-255 range, round and truncate. | 3148 // In 0-255 range, round and truncate. |
3132 bind(&in_bounds); | 3149 bind(&in_bounds); |
3133 vmov(temp_double_reg, 0.5); | 3150 Vmov(temp_double_reg, 0.5); |
3134 vadd(temp_double_reg, input_reg, temp_double_reg); | 3151 vadd(temp_double_reg, input_reg, temp_double_reg); |
3135 vcvt_u32_f64(s0, temp_double_reg); | 3152 vcvt_u32_f64(s0, temp_double_reg); |
3136 vmov(result_reg, s0); | 3153 vmov(result_reg, s0); |
3137 bind(&done); | 3154 bind(&done); |
3138 } | 3155 } |
3139 | 3156 |
3140 | 3157 |
3141 void MacroAssembler::LoadInstanceDescriptors(Register map, | 3158 void MacroAssembler::LoadInstanceDescriptors(Register map, |
3142 Register descriptors) { | 3159 Register descriptors) { |
3143 ldr(descriptors, | 3160 ldr(descriptors, |
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3184 void CodePatcher::EmitCondition(Condition cond) { | 3201 void CodePatcher::EmitCondition(Condition cond) { |
3185 Instr instr = Assembler::instr_at(masm_.pc_); | 3202 Instr instr = Assembler::instr_at(masm_.pc_); |
3186 instr = (instr & ~kCondMask) | cond; | 3203 instr = (instr & ~kCondMask) | cond; |
3187 masm_.emit(instr); | 3204 masm_.emit(instr); |
3188 } | 3205 } |
3189 | 3206 |
3190 | 3207 |
3191 } } // namespace v8::internal | 3208 } } // namespace v8::internal |
3192 | 3209 |
3193 #endif // V8_TARGET_ARCH_ARM | 3210 #endif // V8_TARGET_ARCH_ARM |
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