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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1789 __ ldr(scratch, FieldMemOperand(reg, HeapObject::kMapOffset)); | 1789 __ ldr(scratch, FieldMemOperand(reg, HeapObject::kMapOffset)); |
1790 __ ldrb(scratch, FieldMemOperand(scratch, Map::kBitFieldOffset)); | 1790 __ ldrb(scratch, FieldMemOperand(scratch, Map::kBitFieldOffset)); |
1791 __ tst(scratch, Operand(1 << Map::kIsUndetectable)); | 1791 __ tst(scratch, Operand(1 << Map::kIsUndetectable)); |
1792 EmitBranch(true_block, false_block, ne); | 1792 EmitBranch(true_block, false_block, ne); |
1793 } | 1793 } |
1794 } | 1794 } |
1795 | 1795 |
1796 | 1796 |
1797 Condition LCodeGen::EmitIsObject(Register input, | 1797 Condition LCodeGen::EmitIsObject(Register input, |
1798 Register temp1, | 1798 Register temp1, |
1799 Register temp2, | |
1800 Label* is_not_object, | 1799 Label* is_not_object, |
1801 Label* is_object) { | 1800 Label* is_object) { |
| 1801 Register temp2 = scratch0(); |
1802 __ JumpIfSmi(input, is_not_object); | 1802 __ JumpIfSmi(input, is_not_object); |
1803 | 1803 |
1804 __ LoadRoot(temp1, Heap::kNullValueRootIndex); | 1804 __ LoadRoot(temp2, Heap::kNullValueRootIndex); |
1805 __ cmp(input, temp1); | 1805 __ cmp(input, temp2); |
1806 __ b(eq, is_object); | 1806 __ b(eq, is_object); |
1807 | 1807 |
1808 // Load map. | 1808 // Load map. |
1809 __ ldr(temp1, FieldMemOperand(input, HeapObject::kMapOffset)); | 1809 __ ldr(temp1, FieldMemOperand(input, HeapObject::kMapOffset)); |
1810 // Undetectable objects behave like undefined. | 1810 // Undetectable objects behave like undefined. |
1811 __ ldrb(temp2, FieldMemOperand(temp1, Map::kBitFieldOffset)); | 1811 __ ldrb(temp2, FieldMemOperand(temp1, Map::kBitFieldOffset)); |
1812 __ tst(temp2, Operand(1 << Map::kIsUndetectable)); | 1812 __ tst(temp2, Operand(1 << Map::kIsUndetectable)); |
1813 __ b(ne, is_not_object); | 1813 __ b(ne, is_not_object); |
1814 | 1814 |
1815 // Load instance type and check that it is in object type range. | 1815 // Load instance type and check that it is in object type range. |
1816 __ ldrb(temp2, FieldMemOperand(temp1, Map::kInstanceTypeOffset)); | 1816 __ ldrb(temp2, FieldMemOperand(temp1, Map::kInstanceTypeOffset)); |
1817 __ cmp(temp2, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE)); | 1817 __ cmp(temp2, Operand(FIRST_NONCALLABLE_SPEC_OBJECT_TYPE)); |
1818 __ b(lt, is_not_object); | 1818 __ b(lt, is_not_object); |
1819 __ cmp(temp2, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE)); | 1819 __ cmp(temp2, Operand(LAST_NONCALLABLE_SPEC_OBJECT_TYPE)); |
1820 return le; | 1820 return le; |
1821 } | 1821 } |
1822 | 1822 |
1823 | 1823 |
1824 void LCodeGen::DoIsObject(LIsObject* instr) { | 1824 void LCodeGen::DoIsObject(LIsObject* instr) { |
1825 Register reg = ToRegister(instr->InputAt(0)); | 1825 Register reg = ToRegister(instr->InputAt(0)); |
1826 Register result = ToRegister(instr->result()); | 1826 Register result = ToRegister(instr->result()); |
1827 Register temp = scratch0(); | |
1828 Label is_false, is_true, done; | 1827 Label is_false, is_true, done; |
1829 | 1828 |
1830 Condition true_cond = EmitIsObject(reg, result, temp, &is_false, &is_true); | 1829 Condition true_cond = EmitIsObject(reg, result, &is_false, &is_true); |
1831 __ b(true_cond, &is_true); | 1830 __ b(true_cond, &is_true); |
1832 | 1831 |
1833 __ bind(&is_false); | 1832 __ bind(&is_false); |
1834 __ LoadRoot(result, Heap::kFalseValueRootIndex); | 1833 __ LoadRoot(result, Heap::kFalseValueRootIndex); |
1835 __ b(&done); | 1834 __ b(&done); |
1836 | 1835 |
1837 __ bind(&is_true); | 1836 __ bind(&is_true); |
1838 __ LoadRoot(result, Heap::kTrueValueRootIndex); | 1837 __ LoadRoot(result, Heap::kTrueValueRootIndex); |
1839 | 1838 |
1840 __ bind(&done); | 1839 __ bind(&done); |
1841 } | 1840 } |
1842 | 1841 |
1843 | 1842 |
1844 void LCodeGen::DoIsObjectAndBranch(LIsObjectAndBranch* instr) { | 1843 void LCodeGen::DoIsObjectAndBranch(LIsObjectAndBranch* instr) { |
1845 Register reg = ToRegister(instr->InputAt(0)); | 1844 Register reg = ToRegister(instr->InputAt(0)); |
1846 Register temp1 = ToRegister(instr->TempAt(0)); | 1845 Register temp1 = ToRegister(instr->TempAt(0)); |
1847 Register temp2 = scratch0(); | 1846 Register temp2 = scratch0(); |
1848 | 1847 |
1849 int true_block = chunk_->LookupDestination(instr->true_block_id()); | 1848 int true_block = chunk_->LookupDestination(instr->true_block_id()); |
1850 int false_block = chunk_->LookupDestination(instr->false_block_id()); | 1849 int false_block = chunk_->LookupDestination(instr->false_block_id()); |
1851 Label* true_label = chunk_->GetAssemblyLabel(true_block); | 1850 Label* true_label = chunk_->GetAssemblyLabel(true_block); |
1852 Label* false_label = chunk_->GetAssemblyLabel(false_block); | 1851 Label* false_label = chunk_->GetAssemblyLabel(false_block); |
1853 | 1852 |
1854 Condition true_cond = | 1853 Condition true_cond = |
1855 EmitIsObject(reg, temp1, temp2, false_label, true_label); | 1854 EmitIsObject(reg, temp1, false_label, true_label); |
1856 | 1855 |
1857 EmitBranch(true_block, false_block, true_cond); | 1856 EmitBranch(true_block, false_block, true_cond); |
1858 } | 1857 } |
1859 | 1858 |
1860 | 1859 |
1861 void LCodeGen::DoIsSmi(LIsSmi* instr) { | 1860 void LCodeGen::DoIsSmi(LIsSmi* instr) { |
1862 ASSERT(instr->hydrogen()->value()->representation().IsTagged()); | 1861 ASSERT(instr->hydrogen()->value()->representation().IsTagged()); |
1863 Register result = ToRegister(instr->result()); | 1862 Register result = ToRegister(instr->result()); |
1864 Register input_reg = EmitLoadRegister(instr->InputAt(0), ip); | 1863 Register input_reg = EmitLoadRegister(instr->InputAt(0), ip); |
1865 Label done; | 1864 Label done; |
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4601 ASSERT(osr_pc_offset_ == -1); | 4600 ASSERT(osr_pc_offset_ == -1); |
4602 osr_pc_offset_ = masm()->pc_offset(); | 4601 osr_pc_offset_ = masm()->pc_offset(); |
4603 } | 4602 } |
4604 | 4603 |
4605 | 4604 |
4606 | 4605 |
4607 | 4606 |
4608 #undef __ | 4607 #undef __ |
4609 | 4608 |
4610 } } // namespace v8::internal | 4609 } } // namespace v8::internal |
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