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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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76 bool Operand::is_reg() const { | 76 bool Operand::is_reg() const { |
77 return rm_.is_valid(); | 77 return rm_.is_valid(); |
78 } | 78 } |
79 | 79 |
80 | 80 |
81 | 81 |
82 // ----------------------------------------------------------------------------- | 82 // ----------------------------------------------------------------------------- |
83 // RelocInfo. | 83 // RelocInfo. |
84 | 84 |
85 void RelocInfo::apply(intptr_t delta) { | 85 void RelocInfo::apply(intptr_t delta) { |
86 // On MIPS we do not use pc relative addressing, so we don't need to patch the | 86 if (IsInternalReference(rmode_)) { |
87 // code here. | 87 // Absolute code pointer inside code object moves with the code object. |
| 88 byte* p = reinterpret_cast<byte*>(pc_); |
| 89 int count = Assembler::RelocateInternalReference(p, delta); |
| 90 CPU::FlushICache(p, count * sizeof(uint32_t)); |
| 91 } |
88 } | 92 } |
89 | 93 |
90 | 94 |
91 Address RelocInfo::target_address() { | 95 Address RelocInfo::target_address() { |
92 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); | 96 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); |
93 return Assembler::target_address_at(pc_); | 97 return Assembler::target_address_at(pc_); |
94 } | 98 } |
95 | 99 |
96 | 100 |
97 Address RelocInfo::target_address_address() { | 101 Address RelocInfo::target_address_address() { |
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293 | 297 |
294 | 298 |
295 void Assembler::CheckTrampolinePoolQuick() { | 299 void Assembler::CheckTrampolinePoolQuick() { |
296 if (pc_offset() >= next_buffer_check_) { | 300 if (pc_offset() >= next_buffer_check_) { |
297 CheckTrampolinePool(); | 301 CheckTrampolinePool(); |
298 } | 302 } |
299 } | 303 } |
300 | 304 |
301 | 305 |
302 void Assembler::emit(Instr x) { | 306 void Assembler::emit(Instr x) { |
303 CheckBuffer(); | 307 if (!is_buffer_growth_blocked()) { |
| 308 CheckBuffer(); |
| 309 } |
304 *reinterpret_cast<Instr*>(pc_) = x; | 310 *reinterpret_cast<Instr*>(pc_) = x; |
305 pc_ += kInstrSize; | 311 pc_ += kInstrSize; |
306 CheckTrampolinePoolQuick(); | 312 CheckTrampolinePoolQuick(); |
307 } | 313 } |
308 | 314 |
309 | 315 |
310 } } // namespace v8::internal | 316 } } // namespace v8::internal |
311 | 317 |
312 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ | 318 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ |
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