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Side by Side Diff: src/arm/assembler-arm.h

Issue 7217011: ARM: Fix context save/restore for VFP registers. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 9 years, 6 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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296 const DwVfpRegister d7 = { 7 }; 296 const DwVfpRegister d7 = { 7 };
297 const DwVfpRegister d8 = { 8 }; 297 const DwVfpRegister d8 = { 8 };
298 const DwVfpRegister d9 = { 9 }; 298 const DwVfpRegister d9 = { 9 };
299 const DwVfpRegister d10 = { 10 }; 299 const DwVfpRegister d10 = { 10 };
300 const DwVfpRegister d11 = { 11 }; 300 const DwVfpRegister d11 = { 11 };
301 const DwVfpRegister d12 = { 12 }; 301 const DwVfpRegister d12 = { 12 };
302 const DwVfpRegister d13 = { 13 }; 302 const DwVfpRegister d13 = { 13 };
303 const DwVfpRegister d14 = { 14 }; 303 const DwVfpRegister d14 = { 14 };
304 const DwVfpRegister d15 = { 15 }; 304 const DwVfpRegister d15 = { 15 };
305 305
306 // Aliases for double registers.
307 const DwVfpRegister kFirstCalleeSavedDoubleReg = d8;
308 const DwVfpRegister kLastCalleeSavedDoubleReg = d15;
309
306 310
307 // Coprocessor register 311 // Coprocessor register
308 struct CRegister { 312 struct CRegister {
309 bool is_valid() const { return 0 <= code_ && code_ < 16; } 313 bool is_valid() const { return 0 <= code_ && code_ < 16; }
310 bool is(CRegister creg) const { return code_ == creg.code_; } 314 bool is(CRegister creg) const { return code_ == creg.code_; }
311 int code() const { 315 int code() const {
312 ASSERT(is_valid()); 316 ASSERT(is_valid());
313 return code_; 317 return code_;
314 } 318 }
315 int bit() const { 319 int bit() const {
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1392 public: 1396 public:
1393 explicit EnsureSpace(Assembler* assembler) { 1397 explicit EnsureSpace(Assembler* assembler) {
1394 assembler->CheckBuffer(); 1398 assembler->CheckBuffer();
1395 } 1399 }
1396 }; 1400 };
1397 1401
1398 1402
1399 } } // namespace v8::internal 1403 } } // namespace v8::internal
1400 1404
1401 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1405 #endif // V8_ARM_ASSEMBLER_ARM_H_
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