Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(462)

Side by Side Diff: src/arm/code-stubs-arm.cc

Issue 7192006: Fix wrong parenthesis in stub ARM and MIPS generation code. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 9 years, 6 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | src/mips/code-stubs-mips.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 2543 matching lines...) Expand 10 before | Expand all | Expand 10 after
2554 GenerateSmiSmiOperation(masm); 2554 GenerateSmiSmiOperation(masm);
2555 // Fall through if the result is not a smi. 2555 // Fall through if the result is not a smi.
2556 __ bind(&skip); 2556 __ bind(&skip);
2557 2557
2558 switch (op_) { 2558 switch (op_) {
2559 case Token::ADD: 2559 case Token::ADD:
2560 case Token::SUB: 2560 case Token::SUB:
2561 case Token::MUL: 2561 case Token::MUL:
2562 case Token::DIV: 2562 case Token::DIV:
2563 case Token::MOD: { 2563 case Token::MOD: {
2564 // Load both operands and check that they are 32-bit integer. 2564 // Load both operands and check that they are 32-bit integer.
2565 // Jump to type transition if they are not. The registers r0 and r1 (right 2565 // Jump to type transition if they are not. The registers r0 and r1 (right
2566 // and left) are preserved for the runtime call. 2566 // and left) are preserved for the runtime call.
2567 FloatingPointHelper::Destination destination = 2567 FloatingPointHelper::Destination destination =
2568 CpuFeatures::IsSupported(VFP3) && 2568 (CpuFeatures::IsSupported(VFP3) && op_ != Token::MOD)
2569 op_ != Token::MOD ? 2569 ? FloatingPointHelper::kVFPRegisters
2570 FloatingPointHelper::kVFPRegisters : 2570 : FloatingPointHelper::kCoreRegisters;
2571 FloatingPointHelper::kCoreRegisters;
2572 2571
2573 FloatingPointHelper::LoadNumberAsInt32Double(masm, 2572 FloatingPointHelper::LoadNumberAsInt32Double(masm,
2574 right, 2573 right,
2575 destination, 2574 destination,
2576 d7, 2575 d7,
2577 r2, 2576 r2,
2578 r3, 2577 r3,
2579 heap_number_map, 2578 heap_number_map,
2580 scratch1, 2579 scratch1,
2581 scratch2, 2580 scratch2,
2582 s0, 2581 s0,
2583 &transition); 2582 &transition);
2584 FloatingPointHelper::LoadNumberAsInt32Double(masm, 2583 FloatingPointHelper::LoadNumberAsInt32Double(masm,
2585 left, 2584 left,
2586 destination, 2585 destination,
2587 d6, 2586 d6,
2588 r4, 2587 r4,
2589 r5, 2588 r5,
2590 heap_number_map, 2589 heap_number_map,
2591 scratch1, 2590 scratch1,
2592 scratch2, 2591 scratch2,
2593 s0, 2592 s0,
2594 &transition); 2593 &transition);
2595 2594
2596 if (destination == FloatingPointHelper::kVFPRegisters) { 2595 if (destination == FloatingPointHelper::kVFPRegisters) {
2597 CpuFeatures::Scope scope(VFP3); 2596 CpuFeatures::Scope scope(VFP3);
2598 Label return_heap_number; 2597 Label return_heap_number;
2599 switch (op_) { 2598 switch (op_) {
2600 case Token::ADD: 2599 case Token::ADD:
2601 __ vadd(d5, d6, d7); 2600 __ vadd(d5, d6, d7);
2602 break; 2601 break;
2603 case Token::SUB: 2602 case Token::SUB:
2604 __ vsub(d5, d6, d7); 2603 __ vsub(d5, d6, d7);
(...skipping 43 matching lines...) Expand 10 before | Expand all | Expand 10 after
2648 // Tag the result and return. 2647 // Tag the result and return.
2649 __ SmiTag(r0, scratch1); 2648 __ SmiTag(r0, scratch1);
2650 __ Ret(); 2649 __ Ret();
2651 } else { 2650 } else {
2652 // DIV just falls through to allocating a heap number. 2651 // DIV just falls through to allocating a heap number.
2653 } 2652 }
2654 2653
2655 __ bind(&return_heap_number); 2654 __ bind(&return_heap_number);
2656 // Return a heap number, or fall through to type transition or runtime 2655 // Return a heap number, or fall through to type transition or runtime
2657 // call if we can't. 2656 // call if we can't.
2658 if (result_type_ >= (op_ == Token::DIV) ? BinaryOpIC::HEAP_NUMBER 2657 if (result_type_ >= ((op_ == Token::DIV) ? BinaryOpIC::HEAP_NUMBER
2659 : BinaryOpIC::INT32) { 2658 : BinaryOpIC::INT32)) {
2660 // We are using vfp registers so r5 is available. 2659 // We are using vfp registers so r5 is available.
2661 heap_number_result = r5; 2660 heap_number_result = r5;
2662 GenerateHeapResultAllocation(masm, 2661 GenerateHeapResultAllocation(masm,
2663 heap_number_result, 2662 heap_number_result,
2664 heap_number_map, 2663 heap_number_map,
2665 scratch1, 2664 scratch1,
2666 scratch2, 2665 scratch2,
2667 &call_runtime); 2666 &call_runtime);
2668 __ sub(r0, heap_number_result, Operand(kHeapObjectTag)); 2667 __ sub(r0, heap_number_result, Operand(kHeapObjectTag));
2669 __ vstr(d5, r0, HeapNumber::kValueOffset); 2668 __ vstr(d5, r0, HeapNumber::kValueOffset);
(...skipping 3727 matching lines...) Expand 10 before | Expand all | Expand 10 after
6397 __ mov(result, Operand(0)); 6396 __ mov(result, Operand(0));
6398 __ Ret(); 6397 __ Ret();
6399 } 6398 }
6400 6399
6401 6400
6402 #undef __ 6401 #undef __
6403 6402
6404 } } // namespace v8::internal 6403 } } // namespace v8::internal
6405 6404
6406 #endif // V8_TARGET_ARCH_ARM 6405 #endif // V8_TARGET_ARCH_ARM
OLDNEW
« no previous file with comments | « no previous file | src/mips/code-stubs-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698